Overlay performance for a fin field effect transistor device

Patent metadata

Field	Value
Publication number	US-9219002-B2
Application number	US-201314028724-A
Country	US
Kind code	B2
Filing date	Sep 17, 2013
Priority date	Sep 17, 2013
Publication date	Dec 22, 2015
Grant date	Dec 22, 2015

Abstract

Approaches for improving overlay performance for an integrated circuit (IC) device are provided. Specifically, the IC device (e.g., a fin field effect transistor (FinFET)) is provided with an oxide layer and a pad layer formed over a substrate, wherein the oxide layer comprises an alignment and overlay mark, an oxide deposited in a set of openings formed through the pad layer and into the substrate, a mandrel layer deposited over the oxide material and the pad layer, and a set of fins patterned in the IC device without etching the alignment and overlay mark. With this approach, the alignment and overlay mark is provided with the fin cut (FC) layer and, therefore, avoids finification.

First claim

What is claimed is:

1. A method for forming a device, the method comprising:
forming an oxide layer and a pad layer over a substrate, the oxide layer comprising an alignment and overlay mark;
forming a fin cut (FC) mask over the pad layer;
forming a set of openings through the pad layer and into the substrate;
depositing an oxide in each of the set of openings;
depositing a mandrel layer over the oxide material and the pad layer; and
patterning a set of fins in the devic…

Assignees

• Globalfoundries Inc

Inventors

• Hu Zhenyu
• Wei Andy
• Zhang Qi
• Carter Richard J
• Shen Hongliang
• Pham Daniel
• Muralidharan Sruthi

Classifications

• H10P50/692 Primary

  Electricity · mapped topic

• H10W46/501

  Electricity · mapped topic

• H10W46/301

  Electricity · mapped topic

• H10W46/101

  Electricity · mapped topic

• H10W46/00

  Electricity · mapped topic