Aerogel dielectric layer

Patent metadata

Field	Value
Publication number	US-9218989-B2
Application number	US-201113200477-A
Country	US
Kind code	B2
Filing date	Sep 23, 2011
Priority date	Sep 23, 2011
Publication date	Dec 22, 2015
Grant date	Dec 22, 2015

Abstract

A circuit board assembly includes a circuit board, a chip attached to the circuit board and a dielectric layer. The chip has a circuit facing the circuit board and spaced from it. The dielectric layer includes an aerogel. In one embodiment, the aerogel has a dielectric constant of approximately 2.0 or less and a compression strength of at least approximately 100 psi.

First claim

What is claimed is:

1. A circuit board assembly comprising:
a circuit board;
a flip-chip attached to the circuit board, the flip-chip having a plurality of sensitive components hieing, the circuit board and spaced from the circuit board in a flip-chip configuration;
a plurality of dielectric layer regions respectively covering the plurality of sensitive components between the flip-chip and the circuit board, wherein the dielectric layer regions are laterally separated and comprise an aerogel; and
an underfill between the flip-chip and the circuit board, the underfill disposed between the dielectric layer regions and connected to the circuit board and the flip-chip at locations between the dielectric layer regions.

2. The circuit board assembly according to claim 1 , wherein the aerogel has a dielectric constant of approximately 2.0 or less.

3. The circuit board assembly according to claim wherein the aerogel has a dielectric constant of approximately 1.5 or less.

4. The circuit board assembly according to claim 1 , wherein the aerogel has a compression strength of at least approximately 100 psi.

5. The circuit board assembly according to claim 1 , wherein the aerogel has a compression strength of approximately 100 psi to 400 psi.

6. The circuit board assembly according to claim 1 , wherein the aerogel has a density of approximately 0.05 g/cc to 0.30 g/cc.

7. The circuit board assembly according to claim 1 , wherein the flip-chip comprises a monolithic microwave integrated circuit, the monolithic microwave integrated circuit comprising a field-effect transistor, wherein the plurality of sensitive components includes the field-effect transistor.

8. The circuit board assembly according to claim 1 , wherein an underfill is applied between the flip-chip and the circuit board and wherein the aerogel is disposed between the underfill and the plurality of sensitive components facing the circuit board.

9. The circuit board assembly according to claim 1 , wherein the aerogel has a dielectric constant of approximately 1.15 to 1.40, a density of approximately 0.10 g/cc to 0.25 g/cc, and a compression strength of approximately 100 psi to 360 psi.

10. The circuit board assembly according to claim 1 , wherein the aerogel has a loss tangent of approximately 0.002 to 0.007.

11. The circuit board assembly according to claim 1 , wherein the thickness of the dielectric layer is approximately 5 μm to 20 μm.

12. The circuit board assembly according to claim 7 , wherein the monolithic microwave integrated circuit is fixed to the circuit board by one or more solder bumps or solder posts, wherein an underfill is applied between the monolithic microwave integrated circuit and the circuit hoard, and wherein the aerogel is disposed between the underfill and the field-effect transistor.

13. A method for preparing a plurality of dielectric layer regions for a plurality of sensitive components on a flip-chip facing a circuit board and spaced apart from the circuit board in a flip-chip configuration, the method comprising:
applying an aerogel over the plurality of sensitive components to respectively cover the plurality of sensitive components, wherein the dielectric layer regions are laterally separated; and
applying an underfill between the flip-chip and the circuit board, wherein the underfill disposed between the dielectric layer regions and is connected to the circuit board and the flip-chip at locations between the dielectric layer regions.

14. The method according to claim 13 , wherein the aerogel is applied by:
depositing a gelling precursor solution on the plurality of sensitive components that are configured to face the circuit board;
processing the gelling precursor solution to form the plurality of dielectric layer regions comprising the aerogel on the plurality of sensitive components, wherein the dielectric layer regions respectively Cover the sensitive components and the dielectric layer regions are laterally separated; and
mounting the flip-chip to the circuit board in a flip-chip configuration such that the sensitive components face the circuit board and the dielectric layer regions are between the sensitive components and the circuit board.

15. The method according to claim 13 , wherein the aerogel has a dielectric constant of approximately 2.0 or less and a compression strength of at least approximately 100 psi.

16. The method according to claim 13 , wherein the aerogel has a dielectric constant of approximately 1.5 or less, a density of approximately 0.05 g/cc to 0.30 g/cc, and a compression strength of approximately 100 psi to 400 psi.

17. The method according to claim 13 , wherein the aerogel has a dielectric constant of approximately density of approximately 0.10 g/cc to 0.25 g/cc, and a compression strength of approximately 100 psi to 360 psi.

18. The method according to claim 13 , wherein the gelling precursor solution is deposited by spin coating, stencil priming or dot dispensing.

19. The method according to claim 13 , wherein the gelling precursor solution is deposited by dot dispensing.

20. The method according to claim 13 , wherein the gelling precursor solution is applied to a field effect transistor.

21. The method according to claim 13 , wherein the aerogel has a loss tangent of approximately 0.002 to 0.007.

22. The circuit board assembly according to claim 1 , wherein the underfill disposed between the plurality of dielectric layer regions and directly connected to the circuit board and the flip-chip at the locations between the plurality of dielectric layer regions.

23. The method according to claim 13 , wherein the underfill is disposed between the dielectric layer regions and is directly connected to the circuit board and the flip-chip at locations between the dielectric layer regions.

Assignees

• Hauhe Mark S
• Milne Jason G
• Cisco Terry C
• Nahass Paul
• Gould George
• Zafiropoulos Nick
• Raytheon Co
• Aspen Aerogels Inc

Inventors

• Hauhe Mark S
• Milne Jason G
• Cisco Terry C
• Nahass Paul
• Gould George
• Zafiropoulos Nick

Classifications

• H10W74/47

  comprising organic materials, e.g. plastics or resins · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W74/012 Primary

  of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills · CPC title

• H01L2924/00

  Electricity · mapped topic

• H01L23/293

  Electricity · mapped topic