Method of manufacturing device

Patent metadata

Field	Value
Publication number	US-9209193-B2
Application number	US-201213527141-A
Country	US
Kind code	B2
Filing date	Jun 19, 2012
Priority date	Jun 22, 2011
Publication date	Dec 8, 2015
Grant date	Dec 8, 2015

Abstract

A method of manufacturing a device includes: forming a fifth insulating film on a semiconductor substrate having a peripheral circuit region and a memory cell region in which a contact pad is formed; forming a second sacrifice film in the memory cell region in which the fifth insulating film is formed; forming, after the forming of the second sacrifice, a second insulating film in the peripheral circuit region on the semiconductor substrate to have a sidewall coming into contact with the second sacrifice film; forming a third insulating film to cover an upper surface of the second sacrifice film and an upper surface of the second insulating film; forming a hole penetrating through the third insulating film, the second sacrifice film and the fifth insulating film in the memory cell region; forming a lower electrode in the hole; and removing all of the second sacrifice film.

First claim

What is claimed is:

1. A method of manufacturing a device, the method comprising:
forming a fifth insulating film on a semiconductor substrate having a peripheral circuit region and a memory cell region in which a contact pad is formed;
forming a second sacrifice film in the memory cell region in which the fifth insulating film is formed;
forming, after the forming of the second sacrifice film, a second insulating film in the peripheral circuit region on the semiconductor substrate to have a sidewall coming into contact with the second sacrifice film;
forming a third insulating film to cover an upper surface of the second sacrifice film and an upper surface of the second insulating film;
forming a hole penetrating through the third insulating film, the second sacrifice film and the fifth insulating film in the memory cell region, the hole exposing a sidewall of the second insulating film;
forming a lower electrode in the hole; and
removing all of the second sacrifice film.

2. The method as recited in claim 1 , wherein the second insulating film is made of a material which is not etched by the removing of all of the second sacrifice film.

3. The method as recited in claim 2 , wherein the second sacrifice film comprises an amorphous carbon film.

4. The method as recited in claim 3 , wherein the removing of all of the second sacrifice film is executed by isotropic etching using oxygen plasma asking.

5. The method as recited in claim 2 , wherein the second sacrifice film comprises an amorphous silicon film.

6. The method as recited in claim 5 , wherein the removing of all of the second sacrifice film is executed by isotropic etching using ammonia solution.

7. The method as recited in claim 2 , wherein the second insulating film comprises a single layer film selected from a silicon oxidized film, a silicon nitride film and silicon oxynitride film, or a stacked film including two or more selected from them.

8. The method as recited in claim 1 , wherein each of the fifth insulating film and the third insulating film comprises a silicon nitride film.

9. The method as recited in claim 1 , wherein the forming of the second sacrifice film further comprises:
forming a first sacrifice film on the fifth insulating film; and
removing a part of the first sacrifice film formed in the peripheral circuit region to make a remaining part of the first sacrifice film in the memory cell region the second sacrifice film.

10. The method as recited in claim 1 , wherein the forming of the second insulating film further comprises:
forming a first insulating film to cover an upper surface of the second sacrifice film in the memory cell region and the peripheral circuit region; and
removing a part of the first insulating film located higher than an upper surface of the second sacrifice film to make a remaining part of the first insulating film in the peripheral circuit region the second insulating film.

11. The method as recited in claim 1 , wherein the forming of the hole further comprises:
etching the third insulating film to form a first opening having a linear shape extending in a first direction;
forming a forth insulating film on entire surface to fill the first opening;
etching the forth insulating film to form a second opening overlapping at least a part of the first opening at a certain position;
anisotropically dry etching the second sacrifice film of which an upper surface is partly exposed in the second opening; and
etching the fifth insulating film located lower than the second sacrifice film to expose an upper surface of the contact pad.

12. The method as recited in claim 11 , wherein the certain position is a position just above the contact pad, the position corresponding to a planar position of the contact pad.

13. The method as recited in claim 11 , wherein the fourth insulating film comprises a silicon oxidized film.

14. The method as recited in claim 11 , wherein the removing of all of the second sacrifice film comprises:
removing the fourth insulating film; and thereafter
isotropic etching the second sacrifice film from a part of the upper surface of the second sacrifice film exposed in a second sacrifice film etching opening area, using a part of the first opening except for a part occupied by the lower electrode as the second sacrifice film etching opening area.

15. The method as recited in claim 14 , wherein the second sacrifice film etching opening area is formed before the forming of the lower electrode.

16. The method as recited in claim 11 , wherein the second opening is formed into a shape of a circular hole formed at the certain position in the first opening.

17. The method as recited in claim 11 , wherein the second opening is formed into a shape of a linear groove extending in a second direction perpendicular to the first direction to stretch over a plurality of the first openings each of which has the linear shape extending the first direction, the certain position being located at an intersection of the first opening and the second opening.

18. The method as recited in claim 1 ,
wherein the forming of the lower electrode comprises forming a cylinder type lower electrode on the inner surface of the hole, the cylinder type lower electrode forming a crown type lower electrode by the removing of all of the second sacrifice film, and
wherein the method further comprises, after the removing of all of the second sacrifice film, forming a capacitance insulating film and an upper electrode in order and thereby forming a crown type capacitor having the lower electrode, the capacitance insulating film and the upper electrode.

19. The method as recited in claim 1 ,
wherein the forming of the lower electrode comprises forming a pillar type lower electrode filling the hole, and
wherein the method further comprises, after the removing of all of the second sacrifice film, forming a capacitance insulating film and an upper electrode in order and thereby forming a pillar type capacitor having the lower electrode, the capacitance insulating film and the upper electrode.

20. The method as recited in claim 1 , wherein the hole is a dummy trench.

Assignees

• Ueda Yasuhiko
• Ps4 Luxco Sarl

Inventors

• Ueda Yasuhiko

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/267

  using plasmas · CPC title

• H10D1/716

  having vertical extensions · CPC title

• H10D1/042 Primary

  using deposition processes to form electrode extensions · CPC title

• H01L21/32136

  Electricity · mapped topic