Semiconductor integrated circuit device

Patent metadata

Field	Value
Publication number	US-9201440-B2
Application number	US-201414310731-A
Country	US
Kind code	B2
Filing date	Jun 20, 2014
Priority date	Jun 21, 2013
Publication date	Dec 1, 2015
Grant date	Dec 1, 2015

Abstract

A semiconductor integrated circuit device has, as a current monitor circuit, a circuit in which n-channel type MISFETs are connected in series with each other. Based on a delay time of a speed monitor circuit in a state where a substrate bias is being applied to the p-channel type MISFETs, a first voltage value of a first substrate bias to be applied to the p-channel type MISFETs is determined. Next, based on a current flowing through an n-channel type MISFET in a state where the first substrate bias is being applied to the p-channel type MISFETs of the current monitor circuit and a second substrate bias is being applied to the n-channel type MISFETs of the current monitor circuit, a second voltage value of the second substrate bias to be applied to the n-channel type MISFETs is determined.

First claim

What is claimed is:

1. A semiconductor integrated circuit device, comprising:
a first substrate;
a p-type first semiconductor region which is formed on a first main surface side of the first substrate and extends in a first direction in the first main surface;
an n-type second semiconductor region which is formed on the first main surface side of the first substrate and extends in the first direction in the first main surface;
a p-type third semiconductor region which is fo…

Assignees

• Renesas Electronics Corp

Inventors

• Makiyama Hideki
• Iwamatsu Toshiaki

Classifications

• H10D86/201

  Electricity · mapped topic

• H10D30/60

  Electricity · mapped topic

• G05F1/625 Primary

  Physics · mapped topic

• H03K2217/0018

  Electricity · mapped topic

• H03K17/687 Primary

  Electricity · mapped topic