Vertical type semiconductor devices and methods of manufacturing the same
US-2024172441-A1 · May 23, 2024 · US
US9190484B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9190484-B2 |
| Application number | US-201313745459-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 18, 2013 |
| Priority date | Jan 18, 2013 |
| Publication date | Nov 17, 2015 |
| Grant date | Nov 17, 2015 |
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A tunneling field-effect transistor (TFET) device is disclosed. A frustoconical protrusion structure is disposed over the substrate and protrudes out of the plane of substrate. A drain region is disposed over the substrate adjacent to the frustoconical protrusion structure and extends to a bottom portion of the frustoconical protrusion structure as a raised drain region. A gate stack is disposed over the substrate. The gate stack has a planar portion, which is parallel to the surface of substrate and a gating surface, which wraps around a middle portion of the frustoconical protrusion structure, including overlapping with the raised drain region. An isolation dielectric layer is disposed between the planar portion of the gate stack and the drain region. A source region is disposed as a top portion of the frustoconical protrusion structure, including overlapping with a top portion of the gating surface of the gate stack.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a substrate formed of a semiconductor material and having a frustoconical protrusion structure with a first width protruding out of the plane of from a top surface of the substrate, the substrate formed of a semiconductor material; a drain region with a second width disposed within the substrate adjacent to the frustoconical protrusion structure and extending to a bottom portion of the frustoconical protrusion structure,…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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