Method to etch non-volatile metal materials
US-2015340603-A1 · Nov 26, 2015 · US
Magnetoresistive random access memory cell and fabricating the same
US9178136B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178136-B2 |
| Application number | US-201213587642-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 16, 2012 |
| Priority date | Aug 16, 2012 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes metal-oxide and metal-nitride materials.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor memory device, comprising: a pinning layer over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer; a free layer disposed over the tunneling layer and including ferromagnetic materials; a capping layer disposed over the free layer, wherein the capping layer is configured to provide an etching resistance that protects the free layer and the tunneling layer from edge dama…
Assignees
Inventors
Classifications
- H01L43/12Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- G11C11/161Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9178136B2 cover?
- The present disclosure provides a semiconductor memory device. The device includes a pinning layer having an anti-ferromagnetic material and disposed over a first electrode; a pinned layer disposed over the pinning layer; a tunneling layer disposed over the pinned layer, a free layer disposed over the tunneling layer and a capping layer disposed over the free layer. The capping layer includes m…
- Who is the assignee on this patent?
- Wu Kuo-Ming, Cheng Kai-Wen, Tsai Cheng-Yuan, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H01L43/12. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).