Self-aligned contact metallization for reduced contact resistance
US-9224735-B2 · Dec 29, 2015 · US
Light emitting device having interstitial elements in grain boundaries of barrier layer
US9178117B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178117-B2 |
| Application number | US-201314057341-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 18, 2013 |
| Priority date | Oct 19, 2012 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer, and an electrode on at least one of the first conductive semiconductor layers or the second semiconductor layer. The electrode includes an adhesive layer on the light emitting structure, a barrier layer on the adhesive layer, and a bonding layer on the barrier layer. The barrier layer includes a plurality of grain boundaries, and the grain boundaries include interstitial elements.
First claim
Opening claim text (preview).
What is claimed is: 1. A light emitting device comprising: a light emitting structure including a first conductive semiconductor layer, a second conductive semiconductor layer on the first conductive semiconductor layer, and an active layer therebetween, and an electrode on at least one of the first conductive semiconductor layer or the second conductive semiconductor layer, wherein the electrode comprises: an adhesive layer on the light emitting structure; a barrier layer…
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10D64/0116Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9178117B2 cover?
- A light emitting device includes a light emitting structure including a first conductive semiconductor layer, an active layer on the first conductive semiconductor layer, and a second conductive semiconductor layer on the active layer, and an electrode on at least one of the first conductive semiconductor layers or the second semiconductor layer. The electrode includes an adhesive layer on the …
- Who is the assignee on this patent?
- Lg Innotek Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D64/0116. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).