Device for high voltage applications
US-11862673-B2 · Jan 2, 2024 · US
Semiconductor device and method for manufacturing same
US9178017B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9178017-B2 |
| Application number | US-201414450674-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 4, 2014 |
| Priority date | Aug 21, 2013 |
| Publication date | Nov 3, 2015 |
| Grant date | Nov 3, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor device includes a first well and a second well provided within a semiconductor substrate, an isolation region disposed between the first well and the second well within the semiconductor substrate, a first wiring disposed on the first well, a second wiring disposed on the second well, a concave third wiring disposed on the isolation region, a buried insulating film disposed on the third wiring so as to fill the concave portion thereof, a plurality of fourth wirings disposed on the buried insulating film, and a contact plug disposed so as to electrically connect to at least one of the first and second wells.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for manufacturing a semiconductor device, comprising: preparing a semiconductor substrate including a first well, a second well, and an isolation region between the first well and the second well with respect to a first direction; forming a first conductive film which is located on the first well and one end of which in the first direction is positioned on the isolation region, and a second conductive film which is located on the second well and o…
Assignees
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10W10/031Primary
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9178017B2 cover?
- A semiconductor device includes a first well and a second well provided within a semiconductor substrate, an isolation region disposed between the first well and the second well within the semiconductor substrate, a first wiring disposed on the first well, a second wiring disposed on the second well, a concave third wiring disposed on the isolation region, a buried insulating film disposed on t…
- Who is the assignee on this patent?
- Micron Technology Inc
- What technology area does this patent fall under?
- Primary CPC classification H10W10/031. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).