Pre-soldered leadless package

Patent metadata

Field	Value
Publication number	US-9153529-B2
Application number	US-201414243788-A
Country	US
Kind code	B2
Filing date	Apr 2, 2014
Priority date	Dec 18, 2009
Publication date	Oct 6, 2015
Grant date	Oct 6, 2015

Abstract

Consistent with an example embodiment, a semiconductor device comprises a patterned conductive layer defining contact pads for being connected to terminals of a semiconductor chip. The semiconductor chip comprises the terminals at a first side and an adhesive layer at a second side opposite to the first side; wherein, the semiconductor chip is mounted with an adhesive layer on a patterned conductive layer such that the semiconductor chip part of each respective contact pad leaves part thereof uncovered by the chip for wire bonding. Wire bonds connect respective terminals of the semiconductor chip and respective contact pads at the first side thereof. A molding compound covers the semiconductor chip, the wire bonds and the contact pads; wherein, the molding compound is also located on the second side of the semiconductor device, separating the contact regions that are located directly on a backside of the contact pads.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a patterned conductive layer defining contact pads for being connected to terminals of a semiconductor chip ;
the semiconductor chip comprising the terminals at a first side and an adhesive layer at a second side opposite to the first side, wherein the semiconductor chip is mounted with the adhesive layer on a patterned conductive layer such that the semiconductor chip part of each respective contact pad leaving part thereof uncovered by the chip for wire bonding;
wire bonds connecting respective terminals of the semiconductor chip and the respective contact pad at the first side thereof;
a molding compound covering the semiconductor chip, the wire bonds and the contact pads, wherein the molding compound is also located on the second side of the semiconductor device, separating contact regions that are located directly on a backside of the contact pads;
solder bumps that are provided directly on the backside of that contact pads, and wherein the semiconductor device is configured such that the solder bumps have a side contact surface, wherein the side contact surface is co-planar with the molding compound at a cut line just along the solder bumps; and wherein each of the solder bumps extend from the cut line to the contact regions directly under the respective a terminals.

2. A printed-circuit board comprising the semiconductor device as claimed in claim 1 and terminals for receiving said semiconductor device.

3. The semiconductor device as recited in claim 1 , wherein the contact pads have a pitch smaller than or equal to about 400 μm.

4. The semiconductor device as recited in claim 1 , wherein the contact pads have a pitch smaller than about 250 μm.

5. The semiconductor device as recited in claim 1 , wherein the contact pads have a pitch smaller than or equal to about 150 μm.

Assignees

• Nxp Bv

Inventors

• Van Kempen Jan
• Van Den Boomen René Wilhelmus Johannes Maria
• De Bruin Emiel

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W90/736

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title