Semiconductor device manufacturing method and semiconductor device manufactured using the same
US-2024395745-A1 · Nov 28, 2024 · US
Solid-state image sensor and camera
US9147709B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9147709-B2 |
| Application number | US-201414161029-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 22, 2014 |
| Priority date | Feb 4, 2013 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A solid-state image sensor includes a structure having a semiconductor layer in which a plurality of photoelectric converters are arranged, a light blocking member arranged above a face of the structure and including a plurality of circular openings each corresponding to at least one of the photoelectric converters, a first layer configured to cover the light blocking member, and exposed portions of the face of the structure, that are formed by the plurality of circular openings, and a second layer arranged to cover the first layer and having a refractive index higher than that of the first layer, wherein an interface between the first layer and the second layer includes lens faces protruding toward the exposed portions.
First claim
Opening claim text (preview).
What is claimed is: 1. A solid-state image sensor including a structure having a semiconductor layer in which a plurality of photoelectric converters are arranged, comprising: a light blocking member arranged above a face of the structure and including a plurality of circular openings each corresponding to at least one of the photoelectric converters; a first layer configured to cover the light blocking member, and exposed portions of the face of the structure, formed by the plu…
Assignees
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Classifications
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9147709B2 cover?
- A solid-state image sensor includes a structure having a semiconductor layer in which a plurality of photoelectric converters are arranged, a light blocking member arranged above a face of the structure and including a plurality of circular openings each corresponding to at least one of the photoelectric converters, a first layer configured to cover the light blocking member, and exposed portio…
- Who is the assignee on this patent?
- Canon Kk
- What technology area does this patent fall under?
- Primary CPC classification H10F39/8063. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).