Fin spacer protected source and drain regions in FinFETs

US9147682B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9147682-B2
Application numberUS-201314056649-A
CountryUS
Kind codeB2
Filing dateOct 17, 2013
Priority dateJan 14, 2013
Publication dateSep 29, 2015
Grant dateSep 29, 2015

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin. The integrated circuit device further includes a gate stack on a top surface and sidewalls of the semiconductor fin, and a semiconductor region connected to an end of the semiconductor fin. The semiconductor region includes a first semiconductor region formed of a first semiconductor material, wherein the first semiconductor region comprise faceted top surfaces, and a second semiconductor region underlying the first semiconductor region. The second semiconductor region has a higher germanium concentration than the first semiconductor region. A fin spacer is on a sidewall of the second semiconductor region, wherein the fin spacer overlaps a portion of the insulation regions.

First claim

Opening claim text (preview).

What is claimed is: 1. An integrated circuit device comprising: a semiconductor substrate; insulation regions extending into the semiconductor substrate; a semiconductor fin protruding above the insulation regions, wherein the insulation regions comprise a first portion and a second portion, with the first portion and the second portion on opposite sides of the semiconductor fin; a silicon strip, with opposite edges of the silicon strip contacting sidewalls of the first port…

Assignees

Inventors

Classifications

Patent family

Related publications grouped by family.

External sources

Next steps

Free tools are coming soon. Tell us what you want to track and we'll notify you.

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9147682B2 cover?
An integrated circuit device includes a semiconductor substrate, insulation regions extending into the semiconductor substrate, and a semiconductor fin protruding above the insulation regions. The insulation regions include a first portion and a second portion, with the first portion and second portion on opposite sides of the semiconductor fin. The integrated circuit device further includes a …
Who is the assignee on this patent?
Taiwan Semiconductor Manufactoring Company Ltd, Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H10D84/0158. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).