Semiconductor device and method of manufacturing the same
US-2015357264-A1 · Dec 10, 2015 · US
Lead frame, method for manufacturing lead frame and semiconductor device using same
US9147646B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9147646-B2 |
| Application number | US-201214236168-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 3, 2012 |
| Priority date | Aug 1, 2011 |
| Publication date | Sep 29, 2015 |
| Grant date | Sep 29, 2015 |
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Abstract
Official abstract text for this publication.
Provided is a lead frame by which a die pad can be easily exposed when the lead frame is used for a semiconductor device. The lead frame has a die pad with an upper surface on which a semiconductor element is mounted. The lead frame is used for the semiconductor device with the exposed surface of the die pad being exposed from a sealing resin. A downwardly-projecting first metal burr is formed along the peripheral portion of the exposed surface of the die pad and heads of the first metal burr are flat.
First claim
Opening claim text (preview).
The invention claimed is: 1. A lead frame that comprises a die pad having an upper surface on which a semiconductor element is mounted and that is used for a semiconductor device with a lower surface of the die pad being exposed from a sealing resin, wherein a downwardly-projecting first metal burr is formed along a peripheral portion of the lower surface of the die pad, and heads of the first metal burr are flat. 2. The lead frame according to claim 1 , w…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9147646B2 cover?
- Provided is a lead frame by which a die pad can be easily exposed when the lead frame is used for a semiconductor device. The lead frame has a die pad with an upper surface on which a semiconductor element is mounted. The lead frame is used for the semiconductor device with the exposed surface of the die pad being exposed from a sealing resin. A downwardly-projecting first metal burr is formed …
- Who is the assignee on this patent?
- Shimizu Koji, Mitsui Masanori, Mitsui High Tec
- What technology area does this patent fall under?
- Primary CPC classification H10W70/411. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 29 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).