Testing integrated circuit packaging for output short circuit current

Patent metadata

Field	Value
Publication number	US-9140751-B2
Application number	US-201313851286-A
Country	US
Kind code	B2
Filing date	Mar 27, 2013
Priority date	Mar 27, 2013
Publication date	Sep 22, 2015
Grant date	Sep 22, 2015

Abstract

An electronic package having multiple pins may be tested in parallel for output short circuit current by simulating a direct short to ground by simultaneously connecting multiple output pins directly to ground in order to active a current limiter associated with each of the output pins. The pins are then connected to a resistive connection to ground via a set of resistors; the direct ground is then removed, such that the current limiter associated with each of the output pins remains activated. A voltage drop across each of the set of resistors is measured simultaneously. An output short circuit current fault is indicated when the voltage drop across any of the resistors exceeds a threshold value corresponding to a maximum output short circuit current value.

First claim

What is claimed is:

1. A method for testing an electronic package having multiple pins for output short circuit current, the method comprising:
simulating a direct short to ground by simultaneously connecting a plurality of output pins of the electronic package directly to ground while providing operating voltage to the electronic package, whereby a current limiter associated with each of the plurality of output pins is activated;
coupling the plurality of output pins to a resis…

Assignees

• Texas Instruments Inc

Inventors

• Ong Chee Peng
• Woon Wen Hui
• Zhang Benyong
• Lindgren Eric

Classifications

• G01R31/31715 Primary

  Physics · mapped topic