Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Method and system for a semiconductor for device package with a die-to-packaging substrate first bond
US9136159B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136159-B2 |
| Application number | US-201213678058-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 15, 2012 |
| Priority date | Nov 15, 2012 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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- Title
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Abstract
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Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. The additional die may comprise electronic devices. The first semiconductor die may comprise an interposer die or may comprise electronic devices. The first semiconductor die may be bonded to the packaging substrate utilizing a mass reflow process or a thermal compression process. The additional die may be bonded to the first die utilizing a mass reflow process or a thermal compression process. The bonded die may be encapsulated in a mold material, which may comprise a polymer. The one or more additional die may comprise micro-bumps for coupling to the first semiconductor die.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for semiconductor packaging, the method comprising: bonding a silicon interposer die to a packaging substrate; applying an underfill material between said bonded silicon interposer die and said packaging substrate; and bonding one or more additional die to said bonded silicon interposer die; wherein said one or more additional die comprise electronic devices; and wherein said bonding of said one or more additional die comprises: adhering sa…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9136159B2 cover?
- Methods and systems for a semiconductor device package with a die-to-packing substrate first bond are disclosed and may include bonding a first semiconductor die to a packaging substrate, applying an underfill material between the first semiconductor die and the packaging substrate, and bonding one or more additional die to the first semiconductor die. The additional die may comprise electronic…
- Who is the assignee on this patent?
- Kelly Michael G, Huemoeller Ronald Patrick, Do Won Chul, and 2 more
- What technology area does this patent fall under?
- Primary CPC classification H10W70/635. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).