FinFETs and Methods for Forming the Same
US-2015048453-A1 · Feb 19, 2015 · US
Semiconductor device and method for fabricating the same
US9123744B1 · US · B1
| Field | Value |
|---|---|
| Publication number | US-9123744-B1 |
| Application number | US-201414201373-A |
| Country | US |
| Kind code | B1 |
| Filing date | Mar 7, 2014 |
| Priority date | Mar 7, 2014 |
| Publication date | Sep 1, 2015 |
| Grant date | Sep 1, 2015 |
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Abstract
Official abstract text for this publication.
A method for fabricating a semiconductor device is described. A spacer is formed on a sidewall of a fin structure. A portion of the fin structure is removed to form a cavity exposing at least a portion of the inner sidewall of the spacer. An epitaxy process is performed based on the remaining fin structure to form a semiconductor layer that has a shovel-shaped cross section including: a stem portion in the cavity, and a shovel plane portion contiguous with the stem portion. A semiconductor device is also described, which includes the spacer, the remaining fin structure and the semiconductor layer that are mentioned above.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a semiconductor device, comprising: forming an isolation layer at both sides of a fin structure; forming a spacer on a sidewall of the fin structure and on a top of the isolation layer, wherein the spacer covers only a portion of a top surface of the isolation layer; removing a portion of the fin structure to form a cavity exposing at least a portion of an inner sidewall of the spacer; and performing an epitaxy process based on…
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Electricity · mapped topic
Electricity · mapped topic
- H10P14/3402Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9123744B1 cover?
- A method for fabricating a semiconductor device is described. A spacer is formed on a sidewall of a fin structure. A portion of the fin structure is removed to form a cavity exposing at least a portion of the inner sidewall of the spacer. An epitaxy process is performed based on the remaining fin structure to form a semiconductor layer that has a shovel-shaped cross section including: a stem po…
- Who is the assignee on this patent?
- United Microelectronics Corp
- What technology area does this patent fall under?
- Primary CPC classification H10P14/3402. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).