SiC semiconductor device
US-12080760-B2 · Sep 3, 2024 · US
Semiconductor device and method for manufacturing the same
US9105715B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105715-B2 |
| Application number | US-200913146654-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 30, 2009 |
| Priority date | Apr 30, 2009 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
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In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second conductivity type is in the upper surface of the first major surface on a peripheral portion of the cell region. A second gate insulating film is on the second well, and a thick field oxide film is on the peripheral side than the second gate insulating film. A second gate electrode is sequentially on the second gate insulating film and the field oxide film and electrically connected to the first gate electrode. A first electrode is connected to the first, second well and the diffusion region. A second electrode is connected on a second major surface of the semiconductor substrate. A gate wiring is on the field oxide film, going around a periphery of the cell region, and electrically connected to the second gate electrode. The gate wiring is a silicide of a constituting substance of the second gate electrode.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a semiconductor substrate having a first major surface and a second major surface facing each other; a drift layer of a first conductivity type on the first major surface; a cell region in one upper portion of the drift layer and in the center of the semiconductor device; a well of a second conductivity type in another upper portion of the drift layer disposed in a peripheral region of the semiconductor device; a fi…
Assignees
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Classifications
Electricity · mapped topic
- H10D30/665Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105715B2 cover?
- In a cell region of a first major surface of a semiconductor substrate of a first conductivity type, a first well of a second conductivity type is in an upper surface. A diffusion region of a first conductivity type is in the upper surface in the first well. A first gate insulating film is on the first well, and a first gate electrode on the first gate insulating film. A second well of a second…
- Who is the assignee on this patent?
- Miura Naruhisa, Nakata Shuhei, Ohtsuka Kenichi, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification H10D30/665. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).