Semiconductor device and method of manufacturing same
US-2024395697-A1 · Nov 28, 2024 · US
US9105697B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105697-B2 |
| Application number | US-201314103491-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 11, 2013 |
| Priority date | Dec 11, 2013 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A method embodiment includes forming a hard mask over a dielectric layer, patterning the hard mask to form an opening, forming a passivation layer on sidewalls of the opening, and forming a trench in the dielectric layer by extending the opening into the dielectric layer using an etching process. The sidewalls of the opening are etched to form a rounded profile in the hard mask and a substantially perpendicular profile in the dielectric layer.
Opening claim text (preview).
What is claimed is: 1. A method comprising: forming a hard mask over a dielectric layer; patterning the hard mask to form an opening; forming a passivation layer on sidewalls of the opening; forming a trench in the dielectric layer by extending the opening into the dielectric layer using an etching process; and etching the sidewalls of the opening to form a rounded profile in the hard mask and a substantially perpendicular profile in the dielectric layer.…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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