Rapid Thermal Processing System With Cooling System
US-2024379390-A1 · Nov 14, 2024 · US
Rotatable and tunable heaters for semiconductor furnace
US9105591B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105591-B2 |
| Application number | US-201313964150-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 12, 2013 |
| Priority date | Mar 24, 2009 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
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A method for forming a layer of material on a semiconductor wafer using a semiconductor furnace that includes a thermal reaction chamber having a heating system having a plurality of rotatable heaters for providing a heating zone with uniform temperature profile is provided. The method minimizes temperature variations within the thermal reaction chamber and promotes uniform thickness of the film deposited on the wafers.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for forming a layer of material on a semiconductor wafer comprising: (a) providing a semiconductor furnace comprising: a vertical thermal reaction chamber for processing a batch of wafers, said vertical thermal reaction chamber having a sidewall defining a height and an internal cavity for removably holding the batch of wafers; a wafer boat positionable in the vertical thermal reaction chamber and being configured and adapted to hold a plurality…
Assignees
Inventors
Classifications
Electricity · mapped topic
- H10P95/90Primary
Electricity · mapped topic
Electricity · mapped topic
- F27B17/0025Primary
Mechanical Engineering · mapped topic
- H01L21/324Primary
Electricity · mapped topic
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- What does patent US9105591B2 cover?
- A method for forming a layer of material on a semiconductor wafer using a semiconductor furnace that includes a thermal reaction chamber having a heating system having a plurality of rotatable heaters for providing a heating zone with uniform temperature profile is provided. The method minimizes temperature variations within the thermal reaction chamber and promotes uniform thickness of the fil…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10P95/90. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).