Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
US9105577B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105577-B2 |
| Application number | US-201213398151-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 16, 2012 |
| Priority date | Feb 16, 2012 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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An SOI substrate, a semiconductor device, and a method of backgate work function tuning. The substrate and the device have a plurality of metal backgate regions wherein at least two regions have different work functions. The method includes forming a mask on a substrate and implanting a metal backgate interposed between a buried oxide and bulk regions of the substrate thereby producing at least two metal backgate regions having different doses of impurity and different work functions. The work function regions can be aligned such that each transistor has different threshold voltage. When a top gate electrode serves as the mask, a metal backgate with a first work function under the channel region and a second work function under the source/drain regions is formed. The implant can be tilted to shift the work function regions relative to the mask.
Opening claim text (preview).
We claim: 1. A method of backgate work function tuning comprising: forming a mask over a portion of a semiconductor on insulator (SOI) substrate, wherein the substrate has a SOI layer, a buried insulator (BOX), a bulk layer, and a metal backgate between the BOX and the bulk layer and wherein the mask is a patterned gate stack; implanting the substrate with a species to form a first region of the metal backgate which lacks the implanted species and a second region of the metal ba…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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