Nanowire semiconductor device including lateral-etch barrier region
US-2016380083-A1 · Dec 29, 2016 · US
Electricity
Electricity · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10P90/1908 |
| Official title | — |
| Display label | Electricity (mapped technology topic) |
| Total patents | 380 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is declining.
| Year | Patents |
|---|---|
| 2015 | 36 |
| 2016 | 37 |
| 2017 | 29 |
| 2018 | 25 |
| 2019 | 27 |
| 2020 | 41 |
| 2021 | 40 |
| 2022 | 36 |
| 2023 | 50 |
| 2024 | 18 |
| 2025 | 28 |
| 2026 | 13 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Nanowire semiconductor device including lateral-etch barrier region
US-2016380054-A1 · Dec 29, 2016 · US
Aspect ratio for semiconductor on insulator
US-2016351439-A1 · Dec 1, 2016 · US
Aspect ratio for semiconductor on insulator
US-2016351664-A1 · Dec 1, 2016 · US
Nanowire semiconductor device including lateral-etch barrier region
US-9502523-B1 · Nov 22, 2016 · US
Local soi fins with multiple heights
US-2016336428-A1 · Nov 17, 2016 · US
Compact self-aligned implantation transistor edge resistor for sram seu mitigation
US-2016329349-A1 · Nov 10, 2016 · US
Insulated Gate Bipolar Transistor Structure Having Low Substrate Leakage
US-2016308036-A1 · Oct 20, 2016 · US
Localized region of isolated silicon over recessed dielectric layer
US-9466520-B2 · Oct 11, 2016 · US
Process for fabricating a structure having a buried dielectric layer of uniform thickness
US-2016293476-A1 · Oct 6, 2016 · US
Nanowire semiconductor device including lateral-etch barrier region
US-9455317-B1 · Sep 27, 2016 · US
Method of manufacturing semiconductor device and semiconductor device
US-2016247915-A1 · Aug 25, 2016 · US
Forming isolated fins from a substrate
US-9418902-B2 · Aug 16, 2016 · US
MOSFET with work function adjusted metal backgate
US-9391091-B2 · Jul 12, 2016 · US
Defective P-N junction for backgated fully depleted silicon on insulator mosfet
US-9373507-B2 · Jun 21, 2016 · US
System and method for integrated circuits with cylindrical gate structures
US-9373694-B2 · Jun 21, 2016 · US
Device connection through a buried oxide layer in a silicon on insulator wafer
US-2016141228-A1 · May 19, 2016 · US
Integrated circuit using deep trench through silicon (DTS)
US-9343352-B2 · May 17, 2016 · US
Semiconductor Film with Adhesion Layer and Method for Forming the Same
US-2016111492-A1 · Apr 21, 2016 · US
Finfet semiconductor device having local buried oxide
US-2016111322-A1 · Apr 21, 2016 · US
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Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10P90/1908?
- CPC H10P90/1908 is the Cooperative Patent Classification code for “Electricity.”
- How many patents are filed under CPC H10P90/1908 (Electricity)?
- Our database includes 380 publications tagged with this CPC code.
- Is patent activity under CPC H10P90/1908 growing?
- Publication counts under this code: 18 in 2024 vs 28 in 2025 (latest complete years).