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Imaging systems and methods for providing a switchable impedance to ground
US9105542B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105542-B2 |
| Application number | US-90745710-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 19, 2010 |
| Priority date | Oct 19, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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Abstract
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This is generally directed to a switchable impedance to ground. In particular, a pixel array can be coupled to and surrounded by a ground ring. The ground ring can be coupled to a switchable impedance to ground. During a correlated double sampling (“CDS”) phase of the pixel array, the switchable impedance can be set to a high resistance value. For example, the switchable impedance can be set to 500 ohms. During an analog-to-digital conversion (“ADC”) readout phase of the pixel array, however, the switchable impedance can be set to a low resistance value. For example, the switchable impedance can be set to 1-10 ohms. Setting the switchable impedance to the high impedance value during the CDS phase can prevent imaging errors such as black hole artifacts. Setting the switchable impedance to the low impedance value during the ADC readout phase can, for example, prevent errors due to ground drift.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for reducing artifacts of an imaging system comprising: configuring an imaging device of the imaging system with a switchable impedance configured to couple a ground ring of a pixel array of the imaging device to ground through the switchable impedance wherein the ground ring substantially encircles the pixel array; configuring the switchable impedance to selectively couple the ground ring to ground through a high impedance level in response to a…
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Classifications
Electricity · mapped topic
Electricity · mapped topic
- H10F39/807Primary
Electricity · mapped topic
Electricity · mapped topic
- H01L27/1463Primary
Electricity · mapped topic
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- What does patent US9105542B2 cover?
- This is generally directed to a switchable impedance to ground. In particular, a pixel array can be coupled to and surrounded by a ground ring. The ground ring can be coupled to a switchable impedance to ground. During a correlated double sampling (“CDS”) phase of the pixel array, the switchable impedance can be set to a high resistance value. For example, the switchable impedance can be set to…
- Who is the assignee on this patent?
- Ladd John, Nagaraja Satyadev, Semiconductor Components Ind
- What technology area does this patent fall under?
- Primary CPC classification H10F39/807. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).