Conductive contacts having varying widths and method of manufacturing same

US9105530B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9105530-B2
Application numberUS-201313904885-A
CountryUS
Kind codeB2
Filing dateMay 29, 2013
Priority dateSep 18, 2012
Publication dateAug 11, 2015
Grant dateAug 11, 2015

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  2. Abstract

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a polyimide opening exposing the contact element, and the under bump metallurgy feature has a UBM width. The bump structure further includes a copper pillar on the under bump metallurgy feature. A distal end of the copper pillar width, and the UBM width is greater than the pillar width.

First claim

Opening claim text (preview).

What is claimed is: 1. A bump structure, comprising: a contact element formed over a substrate; a passivation layer overlying the substrate, the passivation layer having a passivation opening exposing the contact element; a polyimide layer overlying the passivation layer, the polyimide layer having a polyimide opening exposing the contact element; an under bump metallurgy (UBM) feature electrically coupled to the contact element, the under bump metallurgy feature having a UB…

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What does patent US9105530B2 cover?
A bump structure includes a contact element formed on a substrate and a passivation layer overlying the substrate. The passivation layer includes a passivation opening exposing the contact element. The bump structure also includes a polyimide layer overlying the passivation layer and an under bump metallurgy (UBM) feature electrically coupled to the contact element. The polyimide layer has a po…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H10W70/093. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).