Heterojunction bipolar transistor having a germanium raised extrinsic base
US-9209264-B2 · Dec 8, 2015 · US
Devices and methodologies related to structures having HBT and FET
US9105488B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105488-B2 |
| Application number | US-201113288427-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 3, 2011 |
| Priority date | Nov 4, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT. In some implementations, a second FET can be provided so as to be located over the substrate and configured to include a channel formed in a semiconductor material that forms an emitter of the HBT. One or more of the foregoing features can be implemented in devices such as a die, a packaged module, and a wireless device.
First claim
Opening claim text (preview).
What is claimed is: 1. A semiconductor structure, comprising: a heterojunction bipolar transistor (HBT) including first and second collector layers located over a substrate, the first collector layer including a p-type semiconductor material, the second collector layer including an n-type semiconductor material and located between the substrate and the first collector layer; and a p-type field effect transistor (FET) located over the substrate, the FET including a channel corres…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105488B2 cover?
- A semiconductor structure includes a heterojunction bipolar transistor (HBT) including a collector layer located over a substrate, the collector layer including a semiconductor material, and a field effect transistor (FET) located over the substrate, the FET having a channel formed in the semiconductor material that forms the collector layer of the HBT. In some implementations, a second FET can…
- Who is the assignee on this patent?
- Zampardi Jr Peter J, Sun Hsiang-Chih, Skyworks Solutions Inc
- What technology area does this patent fall under?
- Primary CPC classification H10D10/021. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).