Mechanism To Enhance PCIe Generation Switching
US-2024427710-A1 · Dec 26, 2024 · US
US9104816B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9104816-B2 |
| Application number | US-2059608-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 28, 2008 |
| Priority date | Jan 26, 2007 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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A memory card is disclosed including first and second host interfaces facilitating the communication of data between the memory card and a host using, respectively, first and second protocols, wherein the first protocol defines low-speed operations and the second protocol defines high-speed operations for the memory card. The second host interface is only enabled in response to an indication by the host device of a high-speed memory card operation.
Opening claim text (preview).
What is claimed is: 1. A memory card comprising: a first communication port facilitating connection between a host and a first host interface, the first host interface facilitating communication of data between the memory card and a host using a first protocol; a second communication port, connected to a second host interface through a plurality of conductive lines, facilitating connection between the host and the second host interface, the second host interface facilitating com…
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