Wiring substrate and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9084339-B2
Application number	US-201313863588-A
Country	US
Kind code	B2
Filing date	Apr 16, 2013
Priority date	Apr 26, 2012
Publication date	Jul 14, 2015
Grant date	Jul 14, 2015

Abstract

A wiring substrate includes: a wiring substrate body including a first surface and a second surface; a first electrode pad including a first recess therein and formed on the first surface of the wiring substrate body; a second electrode pad including a second recess therein and formed on the first surface of the wiring substrate body; a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer including a first opening and a second opening whose opening area is larger than that of the first opening; and a first metal layer electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad. A depth of the first recess is larger than that of the second recess.

First claim

What is claimed is:

1. A wiring substrate comprising:
a wiring substrate body comprising a wiring layer and an insulating layer and comprising a first surface and a second surface opposite to the first surface;
a first electrode pad comprising a first recess therein and formed on the first surface of the wiring substrate body;
a second electrode pad comprising a second recess therein and formed on the first surface of the wiring substrate body;
a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads, the first solder resist layer comprising a first opening and a second opening whose opening area is larger than that of the first opening, wherein the first recess is exposed through the first opening and the second recess is exposed through the second opening;
a third electrode pad formed on the first surface or the second surface of the wiring substrate body; and
a first metal layer formed on the third electrode pad and electrically connected to the first electrode pad and made of a material whose ionization tendency is smaller than that of a material of the first electrode pad,
wherein a depth of the first recess is larger than that of the second recess.

2. The wiring substrate of claim 1 , further comprising:
a second solder resist layer on the second surface of the wiring substrate body and comprising a third opening,
wherein the third electrode pad is formed on the second surface of the wiring substrate body and covered by the second solder resist layer such that the first metal layer is exposed through the third opening.

3. The wiring substrate of claim 2 , further comprising:
a fourth electrode pad formed on the second surface of the wiring substrate body; and
a second metal layer formed on the fourth electrode pad and electrically connected to the second electrode pad and made of a material whose ionization tendency is smaller than that of a material of the second electrode pad,
wherein the second solder resist layer further comprises a fourth opening, and
the fourth electrode pad is covered by the second solder resist layer such that the second metal layer is exposed through the fourth opening.

4. The wiring substrate of claim 1 , wherein the first solder resist layer further comprises a third opening,
wherein the third electrode pad is formed on the first surface of the wiring substrate body and covered by the first solder resist layer such that the first metal layer is exposed through the third opening.

5. A method of manufacturing a wiring substrate, the method comprising:
(a) providing a wiring substrate body comprising a wiring layer and an insulating layer and comprising a first surface and a second surface opposite to the first surface;
(b) forming a first electrode pad and a second electrode pad on the first surface of the wiring substrate body;
(c) forming a first solder resist layer on the first surface of the wiring substrate body to cover the first and second electrode pads;
(d) forming a first opening and a second opening through the first solder resist layer such that the first electrode pad is exposed through the first opening and the second electrode pad is exposed through the second opening, wherein an opening area of the second opening is larger than that of the first opening;
(e) forming a third electrode pad on the first surface or the second surface of the wiring substrate body;
(f) forming a first metal layer on the third electrode pad such that the first metal layer is electrically connected to the first electrode pad, wherein the first metal layer is made of a material whose ionization tendency is smaller than that of a material of the first electrode pad; and
(g) forming a first recess in the first electrode pad and forming a second recess in the second electrode by wet-etching the first and second electrode pads using an etchant in a state that the first and second electrode pads and the first metal layer are in contact with the etchant, wherein a depth of the first recess is larger than that of the second recess.

6. The method of claim 5 , wherein the third electrode pad is formed on the second surface of the wiring substrate body, and
the method further comprising:
(h) forming a second solder resist on the second surface of the wiring substrate body to cover the third electrode; and
(i) forming a third opening through the second solder resist such that the first metal layer is exposed through the third opening.

7. The method of claim 6 , further comprising:
(j) forming a fourth electrode pad on the second surface of the wiring substrate body; and
(k) forming a second metal layer on the fourth electrode pad such that the second electrode pad is electrically connected to the second electrode pad, wherein the second metal layer is made of a material whose ionization tendency is smaller than that of a material of the second electrode pad,
wherein the step (i) further comprises forming a fourth opening through the second solder resist such that the second metal layer is exposed through the fourth opening.

8. The method of claim 5 , wherein
the third electrode pad is formed on the first surface of the wiring substrate body, and
the step (d) further comprises: forming a third opening through the first solder resist layer such that the first metal layer is exposed through the third opening.

9. The wiring substrate of claim 1 , further comprising:
a first electrode terminal provided in the first recess of the first electrode pad; and
a second electrode terminal provided in the second recess of the second electrode pad, and
wherein a height of a distal end of the first electrode terminal with reference to the first surface of the wiring substrate body is substantially equal to a height of a distal end of the second electrode terminal with reference to the first surface of the wiring substrate body.

Assignees

• Shinko Electric Ind Co

Inventors

• Imafuji Kei

Classifications

• H05K3/429

  Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers · CPC title

• H05K3/244 Primary

  Finish plating of conductors, especially of copper conductors, e.g. for pads or lands (selective plating methods H05K3/243; finish plating of conductors made by printing techniques H05K3/246; solder as finish H05K3/3465) · CPC title

• H05K2201/0769

  Anti metal-migration, e.g. avoiding tin whisker growth · CPC title

• H05K3/00 Primary

  Apparatus or processes for manufacturing printed circuits · CPC title

• H05K2201/096

  Vertically aligned vias, holes or stacked vias · CPC title