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Method for fabricating magnetoresistive random access memory element
US9070871B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9070871-B2 |
| Application number | US-201414529176-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 31, 2014 |
| Priority date | Mar 31, 2010 |
| Publication date | Jun 30, 2015 |
| Grant date | Jun 30, 2015 |
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Abstract
Official abstract text for this publication.
A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular reference layer, the second insulating layer and the first gap fill material layer; an annular free layer in a second via hole of a third insulating layer on the second insulating layer, the annular free layer being situated above the annular reference layer; and a top electrode stacked on the annular free layer.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for fabricating a magnetoresistive random access memory (MRAM) element, comprising: providing a substrate; depositing a first insulating layer on the substrate; forming a first bottom electrode and a second bottom electrode in the first insulating layer, wherein the first bottom electrode is spaced apart from the second bottom electrode; depositing a second insulating layer on the first insulating layer and on the first and second bottom elect…
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Classifications
Electricity · mapped topic
Operations & Transport · mapped topic
- B82Y25/00Primary
Operations & Transport · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9070871B2 cover?
- A magnetoresistive random access memory (MRAM) element includes a bottom electrode embedded in a first insulating layer; an annular reference layer in a first via hole of a second insulating layer on the first insulating layer, the annular reference layer being situated above the bottom electrode; a first gap fill material layer filling the first via hole; a barrier layer covering the annular r…
- Who is the assignee on this patent?
- Nanya Technology Corp
- What technology area does this patent fall under?
- Primary CPC classification B82Y25/00. Mapped technology areas include Operations & Transport.
- When was this patent published?
- Publication date Tue Jun 30 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).