Memory Device Having Oxygen Control Layers And Manufacturing Method Of Same
US-2015372228-A1 · Dec 24, 2015 · US
Resistance memory cell and operation method thereof
US9070860B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9070860-B2 |
| Application number | US-201213601209-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 31, 2012 |
| Priority date | Jun 25, 2012 |
| Publication date | Jun 30, 2015 |
| Grant date | Jun 30, 2015 |
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- Title
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Abstract
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A resistance memory cell is provided and includes a first electrode, a tungsten metal layer, a metal oxide layer, and a second electrode. The tungsten metal layer is disposed on the first electrode. The metal oxide layer is disposed on the tungsten metal layer. The second electrode includes a first connection pad, a second connection pad, and a bridge portion electrically connected between the first connection pad and the second connection pad. The bridge portion is disposed on the metal oxide layer or surrounds the metal oxide layer. The resistance memory cell adjusts a resistivity of the metal oxide layer through a first current path, passing through the metal oxide layer and the tungsten metal layer, or a second current path extending from the first connection pad to the second connection pad.
First claim
Opening claim text (preview).
What is claimed is: 1. A resistance memory cell, comprising: a first electrode; a tungsten metal layer disposed on the first electrode; a metal oxide layer disposed on the tungsten metal layer; and a second electrode comprising a first connection pad, a second connection pad, and a bridge portion electrically connected between the first connection pad and the second connection pad, and the bridge portion being disposed on the metal oxide layer or surrounding the metal oxide…
Assignees
Inventors
Classifications
- H01L45/08Primary
Electricity · mapped topic
Physics · mapped topic
- G11C13/0007Primary
Physics · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9070860B2 cover?
- A resistance memory cell is provided and includes a first electrode, a tungsten metal layer, a metal oxide layer, and a second electrode. The tungsten metal layer is disposed on the first electrode. The metal oxide layer is disposed on the tungsten metal layer. The second electrode includes a first connection pad, a second connection pad, and a bridge portion electrically connected between the …
- Who is the assignee on this patent?
- Chien Wei-Chih, Lee Ming-Hsiu, Macronix Int Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H01L45/08. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jun 30 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).