Systems and methods for efficient low density parity check (LDPC) decoding

Patent metadata

Field	Value
Publication number	US-9065484-B2
Application number	US-201314034288-A
Country	US
Kind code	B2
Filing date	Sep 23, 2013
Priority date	Jan 27, 2009
Publication date	Jun 23, 2015
Grant date	Jun 23, 2015

Abstract

A method for low density parity code decoding according to one embodiment includes sequentially processing groups of variable node (vnode) values associated with a codeword using a plurality of vnode logic modules and outputting updated vnode values; storing the vnode values and updated vnode values in a vnode memory; sequentially processing groups of cnode values using a plurality of check node (cnode) logic modules and outputting updated vnode values; storing the (mode values and updated (mode values in a mode memory; and checking the codeword using the updated vnode values and the updated mode values.

First claim

What is claimed is:

1. A method for low density parity code decoding, the method comprising:
sequentially processing groups of variable node (vnode) values associated with a codeword using a plurality of vnode logic modules and outputting updated vnode values;
storing the vnode values and updated vnode values in a vnode memory;
sequentially processing groups of cnode values using a plurality of check node (cnode) logic modules and outputting updated vnode values;
storing the…

Assignees

• IBM

Inventors

• Sandberg Melanie J
• Viens Matthew M

Classifications

• H03M13/1137 Primary

  Electricity · mapped topic

• H03M13/13 Primary

  Electricity · mapped topic