Flip-flop having shared feedback and method of operation

US9059687B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9059687-B2
Application numberUS-201414316315-A
CountryUS
Kind codeB2
Filing dateJun 26, 2014
Priority dateOct 28, 2009
Publication dateJun 16, 2015
Grant dateJun 16, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of operating a circuit includes receiving a first data signal at a first node. The first node is coupled to a second node to couple the first data signal to the second node. After coupling the first node to the second node, an inversion is enabled from the second node to a third node. An inversion from the third node to the fourth node is provided. After the enabling the inversion from the second node to the third node, the first node is decoupled from the second node. After the enabling the inversion from the second node to the third node, the second node is coupled to the third node. An inversion from the fourth node to the third node is enabled and the second node is decoupled from the fourth node.

First claim

Opening claim text (preview).

What is claimed is: 1. A circuit comprising: a first transmission gate having a first terminal coupled to a first node and a second terminal coupled to a second node; a first inverting element having an input coupled to a third node and an output coupled to a fourth node; a second transmission gate having a first terminal coupled to the second node and a second terminal coupled to the fourth node; and a logic circuit having a first input coupled to the second node, a second…

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What does patent US9059687B2 cover?
A method of operating a circuit includes receiving a first data signal at a first node. The first node is coupled to a second node to couple the first data signal to the second node. After coupling the first node to the second node, an inversion is enabled from the second node to a third node. An inversion from the third node to the fourth node is provided. After the enabling the inversion from…
Who is the assignee on this patent?
Ramaraju Ravindraraj, Kenkare Prashant U, Freescale Semiconductor Inc
What technology area does this patent fall under?
Primary CPC classification H03K3/356156. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jun 16 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).