Shallow trench isolation structures

Patent metadata

Field	Value
Publication number	US-9059243-B2
Application number	US-201213531654-A
Country	US
Kind code	B2
Filing date	Jun 25, 2012
Priority date	Jun 25, 2012
Publication date	Jun 16, 2015
Grant date	Jun 16, 2015

Abstract

Shallow trench isolation structures are provided for use with UTBB (ultra-thin body and buried oxide) semiconductor substrates, which prevent defect mechanisms from occurring, such as the formation of electrical shorts between exposed portions of silicon layers on the sidewalls of shallow trench of a UTBB substrate, in instances when trench fill material of the shallow trench is subsequently etched away and recessed below an upper surface of the UTBB substrate.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a silicon-on-insulator (SOI) semiconductor substrate comprising a first silicon layer, a second silicon layer, and a buried oxide layer disposed between the first silicon layer and the second silicon layer;
a high-K gate dielectric layer formed on the first silicon layer;
a shallow trench isolation structure formed in the semiconductor substrate, the shallow trench isolation structure comprising:
a shallow trench form…

Assignees

• Doris Bruce B
• Cheng Kangguo
• Haran Balasubramanian S
• Khakifirooz Ali
• Kulkarni Pranita
• Kumar Arvind
• Ponoth Shom
• IBM

Inventors

• Doris Bruce B
• Cheng Kangguo
• Haran Balasubramanian S
• Khakifirooz Ali
• Kulkarni Pranita
• Kumar Arvind
• Ponoth Shom

Classifications

• H10W10/181

  Electricity · mapped topic

• H10W10/061

  Electricity · mapped topic

• H10W10/17

  Electricity · mapped topic

• H10W10/014 Primary

  Electricity · mapped topic

• H10P90/1906 Primary

  Electricity · mapped topic