Memory element having ion source layers with different contents of a chalcogen element

Patent metadata

Field	Value
Publication number	US-9058873-B2
Application number	US-201213527764-A
Country	US
Kind code	B2
Filing date	Jun 20, 2012
Priority date	Jun 30, 2011
Publication date	Jun 16, 2015
Grant date	Jun 16, 2015

Abstract

A memory element includes: a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer containing one or more of metallic elements, and the ion source layer being provided on the second electrode side. The ion source layer includes a first ion source layer and a second ion source layer, the first ion source layer containing one or more of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and being provided on the resistance change layer side, and the second ion source layer containing the chalcogen element with a content different from a content in the first ion source layer and being provided on the second electrode side.

First claim

What is claimed is:

1. A memory element, comprising:
a first electrode, a memory layer, and a second electrode in this order, the memory layer including (i) a resistance change layer provided on the first electrode side and (ii) an ion source layer containing a plurality of metallic elements, the ion source layer being provided on the second electrode side,
wherein,
the ion source layer includes a first ion source layer and a second ion source layer, the first ion source layer containing one or more of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and being provided on the resistance change layer side, and the second ion source layer containing the chalcogen element with a content different from a content in the first ion source layer and being provided on the second electrode side,
the first ion source layer has a multi-layer structure made up of one or more first layers and one or more second layers, the one or more first and second layers being alternately stacked one upon another,
each first layer of the first ion source layer contains the one or more of chalcogen elements and at least one first metallic element,
each second layer of the first ion source layer contains at least one second metallic element that is different from the at least one first metallic element and, relative to the at least one first metallic element, is difficult to move as an ion in the memory layer, and
in a thickness direction of the memory element, a density distribution of the at least one first metallic element in each first layer is such that, relative to a density of the at least one first metallic element in a middle portion of the first layer, a density of the at least one first metallic element on an interface between the first layer and the second layer is low or zero.

2. The memory element according to claim 1 , wherein the at least one first metallic element is at least one element selected from the group consisting of copper (Cu) and aluminum (Al).

3. The memory element according to claim 1 , wherein the at least one second metallic element is at least one element in a transition metal group of titanium (Ti), zirconium (Zr), hafnium (Hf), vanadium (V), niobium (Nb), tantalum (Ta), chromium (Cr), molybdenum (Mo), and tungsten (W).

4. The memory element according to claim 1 , wherein the content of the chalcogen element in the second ion source layer is lower than the content of the chalcogen element in the first ion source layer.

5. The memory element according to claim 1 , wherein a resistance value of the second ion source layer is lower than a resistance value of one of the layers that make up the first ion source layer and that is in contact with the resistance change layer.

6. The memory element according to claim 1 , wherein a resistance value of the resistance change layer changes in response to an application of a voltage to the first and second electrodes.

7. The memory element according to claim 1 , wherein a film thickness of the first ion source layer is equal to or greater than 6 nm.

8. The memory element according to claim 1 , wherein a film thickness of the first ion source layer is equal to or greater than 8 nm.

9. The memory element according to claim 2 , wherein each first layer in the first memory layer further includes at least one of germanium (Ge) and zinc (Zn).

10. The memory element according to claim 3 , wherein each second layer in the first memory layer further includes at least one of copper (Cu), silver (Ag), and silicon (Si).

11. The memory element according to claim 1 , wherein the second ion source layer has a single-layer structure.

12. The memory element according to claim 1 , wherein the density of the at least one first metallic element gradually decreases from the middle portion of the first layer to the interface between the first layer and the second layer.

Assignees

• Shimuta Masayuki
• Yasuda Shuichiro
• Mizuguchi Tetsuya
• Ohba Kazuhiro
• Aratani Katsuhisa
• Sony Corp

Inventors

• Shimuta Masayuki
• Yasuda Shuichiro
• Mizuguchi Tetsuya
• Ohba Kazuhiro
• Aratani Katsuhisa

Classifications

• G11C13/0007 Primary

  comprising metal oxide memory material, e.g. perovskites · CPC title

• G11C13/0011

  comprising conductive bridging RAM [CBRAM] or programming metallization cells [PMCs] · CPC title

• G11C2213/55

  Structure including two electrodes, a memory active layer and at least two other layers which can be a passive or source or reservoir layer or a less doped memory active layer · CPC title

• H01L27/2436

  Electricity · mapped topic

• H01L45/1266

  Electricity · mapped topic