Sensing supply voltage swings within an integrated circuit

Patent metadata

Field	Value
Publication number	US-9057761-B2
Application number	US-201113341547-A
Country	US
Kind code	B2
Filing date	Dec 30, 2011
Priority date	Dec 30, 2011
Publication date	Jun 16, 2015
Grant date	Jun 16, 2015

Abstract

An integrated circuit including a plurality of sensors configured to sense variations in supply voltage levels at points within the integrated circuit is disclosed. The plurality of sensors are distributed across the integrated circuit and have transistor devices such that process variations in the transistor devices within the sensors are such that a sensing result will have a random voltage offset that has a predetermined probability of lying within a pre-defined voltage offset range. The integrated circuit is configured to transmit results from multiple ones of the plurality of sensors to processing circuitry such that the variations in the supply voltage levels can be determined with a voltage offset range that is reduced compared to the pre-defined voltage offset range.

First claim

We claim:

1. An integrated circuit comprising a plurality of sensors configured to sense variations in supply voltage levels at points within said integrated circuit, said plurality of sensors being distributed across said integrated circuit;
said plurality of sensors comprising transistor devices such that local process variations in said transistor devices within said sensors are such that a sensing result will have a random voltage offset that has a predetermined probability of lying within a pre-defined voltage offset range; wherein
said integrated circuit is configured to transmit results from multiple ones of said plurality of sensors to processing circuitry.

2. An integrated circuit according to claim 1 , wherein said integrated circuit is powered by a power supply that supplies a high supply voltage level and a low supply voltage level to said integrated circuit, a supply voltage level sensed being one of said high supply voltage level or said low supply voltage level.

3. An integrated circuit according to claim 2 , wherein said low supply voltage level is a ground voltage level.

4. An integrated circuit according to claim 1 , wherein each of said plurality of sensors comprises a voltage level sensor configured to compare a supply voltage level to a reference voltage level and to generate digital result indicative of whether said supply voltage level is smaller or larger than said reference voltage level.

5. An integrated circuit according to claim 4 , wherein said processing circuitry comprises calibration circuitry for calibrating each of said plurality of sensors to determine individual voltage offsets at which said voltage level sensors switch said generated digital result.

6. An integrated circuit according to claim 5 , said processing circuitry being configured to disable a subset of said plurality of voltage sensors in response to said calibration circuitry, said subset being selected from said plurality of sensors with a largest voltage offset.

7. An integrated circuit according to claim 4 , said integrated circuit further comprising a plurality of error detection circuits and error recovery circuitry and calibration circuitry;
said plurality of error detection circuits being configured to determine if a signal sampled in said integrated circuit changes within a time window occurring after a sampling of said signal and during a same clock cycle as said sampling of said signal and to signal an error if said signal does change;
said calibration circuitry being configured to vary conditions and determine when each of said error detection circuits detects an error and in response to detecting an error in one of said error detection circuits to vary said reference voltage level supplied to one of said plurality of sensors close to said error detection circuit such that said one of said plurality of sensors signals a change in supply voltage level at a point close to a point where said error is generated.

8. An integrated circuit according to claim 4 , said sensors comprising latching circuitry for latching said digital result, said latching circuitry being arranged in a chain such that said digital result stored in said latching circuitry is serially output to said processing circuitry, said sensors being configured to output said result data in response to receipt of an output control signal.

9. An integrated circuit according to claim 1 , said integrated circuit further comprising said processing circuitry, said processing circuitry configured to receive results from multiple ones of said plurality of sensors and to determine said variations in said supply voltage level with said voltage offset range that is reduced compared to said pre-defined voltage offset range.

10. An integrated circuit according to claim 1 , wherein each of said plurality of sensors have a same layout.

11. An integrated circuit according to claim 1 , said integrated circuit further comprising a plurality of cells, said plurality of cells each comprising devices for performing a predetermined function, at least some of said sensors being located in areas of high cell density.

12. An integrated circuit according to claim 1 , wherein said integrated circuit comprises at least ten voltage sensors and said pre-defined voltage offset range is between 5 and 300 mV.

13. An integrated circuit according to claim 1 , wherein said processing circuitry combines results from at least some of said sensors and performs a statistical analysis to determine global voltage level supply variations.

14. An integrated circuit according to claim 13 , wherein said integrated circuit comprises a predetermined number of sensors with a pre-defined offset voltage range, such that a statistical significant result from said sensors is attained, a larger pre-defined offset voltage range requiring a larger number of sensors to attain said statistical significant result.

15. An integrated circuit according to claim 1 , wherein said processing circuitry is configured to combine results from sensors in different regions of said integrated circuit and to determine a variation in supply voltage levels in each of said different regions.

16. An integrated circuit according to claim 1 , said integrated circuit further comprising a plurality of error detection circuits and error recovery circuitry;
said plurality of error detection circuits being configured to determine if a signal sampled in said integrated circuit changes within a time window occurring after a sampling of said signal and during a same or an adjacent clock cycle as said sampling of said signal and to signal an error if said signal dose change;
said processing circuitry being configured to receive signals from said error detection circuits and to determine in response to detection of an error whether one of said plurality of sensors has indicated a change in supply voltage level.

17. An integrated circuit according to claim 16 , wherein said processing circuitry is configured to determine whether a one of said plurality of sensors that indicated a change in supply voltage level is close to an error detection circuit and if so to indicate a change in supply voltage at said point.

18. An integrated circuit according to claim 1 , said processing circuitry being configured to vary at least one of a supply voltage, clocking frequency or processing function in response to detecting variations in supply voltage that rise above a predetermined limit value.

19. An integrated circuit according to claim 1 , said integrated circuit further comprising a plurality of flip flops, wherein each of said plurality of sensors has an area that is less than an area of two of said flip flops on said integrated circuit.

20. A method of sensing variations in supply voltage levels at points within an integrated circuit comprising the steps of:
arranging a plurality of sensors distributed across said integrated circuit;
said plurality of sensors comprising transistor devices such that local process variations in said transistor devices within said sensors are such that a sensing result will have a random voltage offset that has a predetermined probability of lying within a pre-defined voltage offset range;
transmitting results from multiple ones of said plurality of sensors to processing circuitry;
processing said results such that said variations in said supply voltage levels are determined with a voltage offset range that is reduced compared to said pre-defined voltage offset range.

21. A method according to claim

Assignees

• Whatmough Paul Nicholas
• Bull David Michael
• Das Shidhartha
• Advanced Risc Mach Ltd

Inventors

• Whatmough Paul Nicholas
• Bull David Michael
• Das Shidhartha

Classifications

• G01R31/30

  Marginal testing, e.g. by varying supply voltage (testing computers during standby operation or idle time G06F11/22) · CPC title

• G01R31/3004 Primary

  Current or voltage test · CPC title

• G05F3/24

  wherein the transistors are of the field-effect type only (G05F3/205, G05F3/26, G05F3/30 take precedence) · CPC title

• G05F3/02 Primary

  Regulating voltage or current · CPC title