Semiconductor devices and methods of manufacturing
US-12166025-B2 · Dec 10, 2024 · US
US9041069B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9041069-B2 |
| Application number | US-201113007235-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 14, 2011 |
| Priority date | Jan 14, 2011 |
| Publication date | May 26, 2015 |
| Grant date | May 26, 2015 |
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Official abstract text for this publication.
A system and method for a distributed metal routing is disclosed. An embodiment comprises a metal_0 layer with a metal_1 layer overlying the metal_0 layer. The metal_1 layer comprises separate parallel lines, with lines having different signals being distributed across the metal_1 layer. Such a layout decreases the parasitic resistance within the metal_0 layer as it decreases the distance current travels. Additionally, the distributed layout in metal_1 allows connections to be made to a metal_2 layer without the need for a hammer head connection of vias.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device comprising: a first conductive layer on a substrate, the first conductive layer comprising a first plurality of conductive lines and a second plurality of conductive lines, wherein the first plurality of conductive lines is parallel to and interleaved with the second plurality of conductive lines, at least some of the first plurality of conductive lines serving as gates for transistors formed in the substrate; and a second conductive…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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