Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
Photo resist trimmed line end space
US9040433B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9040433-B2 |
| Application number | US-201414479404-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 8, 2014 |
| Priority date | Jan 4, 2013 |
| Publication date | May 26, 2015 |
| Grant date | May 26, 2015 |
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Abstract
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One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of the first patterned second HM region or the first HM region. Photo resist (PR) is patterned above the second sacrificial HM region, and a spacer region is deposited above the patterned PR and second sacrificial HM region. In some embodiments, at least some of at least one of the spacer region, the PR, or the respective sacrificial HMs is removed. In this way, a line end space structure associated with an end-to-end space is formed.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for forming a line end space structure, comprising: forming a hard mask (HM) region above a base region in which a metal line is formed; forming a second HM region above the HM region; patterning the second HM region to form a patterned second HM region, the patterned second HM region defining a line end space structure; patterning the HM region using the patterned second HM region to form a patterned HM region; and removing at least some of…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9040433B2 cover?
- One or more techniques or systems for forming a line end space structure are provided herein. In some embodiments, a first patterned second hard mask (HM) region is formed above a first HM region. Additionally, at least some of the first patterned second HM region is removed. In some embodiments, a first sacrificial HM region and a second sacrificial HM region are formed above at least one of t…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10P76/4085. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue May 26 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).