Singulation processes

US9040389B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9040389-B2
Application numberUS-201213648216-A
CountryUS
Kind codeB2
Filing dateOct 9, 2012
Priority dateOct 9, 2012
Publication dateMay 26, 2015
Grant dateMay 26, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of forming a semiconductor device, the method comprising: forming a groove at a first side of a silicon substrate, the groove extending partially into the silicon substrate without extending through the silicon substrate, the silicon substrate comprising doped regions, wherein the silicon substrate comprises active device regions proximate the first side; forming a dicing layer from a second side of the silicon substrate, the dicing layer disposed under the groove within the silicon substrate, the second side being opposite the first side, wherein forming the groove comprises using a laser ablation process using light at a wavelength between ultraviolet and infrared, and wherein forming the dicing layer comprises using a stealth laser process using light at a wavelength above 900 nm; and singulating the silicon substrate through the dicing layer and the groove, wherein the singulating comprises attaching the silicon substrate to a tape, and forming a crack from the groove through the dicing layer by expanding the tape. 2. The method of claim 1 , wherein the stealth laser dicing process uses wavelength of light more than about 1000 nm. 3. The method of claim 1 , wherein the groove is formed within a dicing channel on the silicon substrate. 4. The method of claim 3 , wherein the dicing layer is formed within the dicing channel of the silicon substrate. 5. The method of claim 1 , wherein the groove has a depth of about 1 μm to about 50 μm in the silicon substrate. 6. The method of claim 1 , wherein the groove extends through a metallization layer disposed over the silicon substrate upto a top surface of the silicon substrate. 7. The method of claim 1 , further comprising applying a water-soluble protective coating prior to forming the groove. 8. The method of claim 1 , wherein the silicon substrate comprises a silicon wafer. 9. A method of forming a semiconductor device, the method comprising: using a first laser process, forming a groove through a metallization layer disposed over a silicon substrate, the groove extending into the silicon substrate and the metallization layer coupled to device regions in the silicon substrate; using a second laser process, forming a dicing layer under the groove within the silicon substrate, wherein the second laser process is performed using multi-passing scanning process, and wherein a focal point of a laser beam of the second laser process is adjusted progressively deeper in each subsequent scan step of the multi-passing scanning process, wherein using the first laser process comprises using a laser ablation process using light at a wavelength between ultraviolet and infrared, and wherein using the second laser process comprises using a stealth laser process using light at a wavelength above 900 nm; attaching the silicon substrate to a tape; and performing a tape expansion process on the tape with the silicon substrate, wherein performing the tape expansion process comprises forming a crack from the groove through the dicing layer by expanding the tape. 10. The method of claim 9 , wherein the first laser process is a laser ablation process, and wherein the second laser process is a stealth laser dicing process. 11. The method of claim 10 , wherein the first laser process is a single scan process. 12. The method of claim 10 , wherein the first laser process is performed from a first side of the silicon substrate, and wherein the second laser process is performed from an opposite second side of the silicon substrate. 13. The method of claim 9 , wherein the second laser process uses light of wavelength greater than 1000 nm. 14. The method of claim 9 wherein expanding the tape comprises heating the tape. 15. The method of claim 9 , wherein the groove is formed within a dicing channel on the silicon substrate, and wherein the dicing layer is formed within the dicing channel of the silicon substrate. 16. The method of claim 9 , wherein the groove has a depth of about 5 μm to about 20 μm in the silicon substrate. 17. The method of claim 9 , further comprising applying a water-soluble protective coating prior to forming the groove. 18. The method of claim 9 , further comprising thinning the silicon substrate prior to forming the groove. 19. The method of claim 9 , further comprising thinning the silicon substrate after forming the groove. 20. A method of forming a semiconductor device, the method comprising: using a first laser process, forming a groove through a metallization layer disposed over a silicon substrate, the groove extending into the silicon substrate and the metallization layer coupled to device regions in the silicon substrate; using a second laser process, forming a dicing layer under the groove within the silicon substrate, wherein the second laser process is performed using multi-passing scanning process, and wherein a focal point of a laser beam of the second laser process is adjusted progressively deeper in each subsequent scan step of the multi-passing scanning process, wherein using the first laser process comprises using a laser ablation process using light at a wavelength between ultraviolet and infrared, and wherein using the second laser process comprises using a stealth laser process using light at a wavelength above 900 nm; attaching the silicon substrate to a tape; and performing a tape expansion process on the tape with the silicon substrate by heating the tape. 21. The method of claim 20 , wherein the first laser process is a laser ablation process, and wherein the second laser process is a stealth laser dicing process. 22. The method of claim 21 , wherein the first laser process is a single scan process. 23. The method of claim 21 , wherein the first laser process is performed from a first side of the silicon substrate, and wherein the second laser process is performed from an opposite second side of the silicon substrate. 24. The method of claim 20 , wherein the second laser process uses light of wavelength greater than 1000 nm. 25. The method of claim 20 , wherein the groove is formed within a dicing channel on the silicon substrate, and wherein the dicing layer is formed within the dicing channel of the silicon substrate. 26. The method of claim 20 , wherein the groove has a depth of about 5 μm to about 20 μm in the silicon substrate. 27. The method of claim 20 , further comprising applying a water-soluble protective coating prior to forming the groove. 28. The method of claim 20 , further comprising thinning the silicon substrate prior to forming the groove. 29. The method of claim 20 , further comprising thinning the silicon substrate after forming the groove.

Assignees

Inventors

Classifications

  • used to protect an active side of a device or wafer · CPC title

  • used during dicing or grinding · CPC title

  • involving stretching of the auxiliary support post dicing · CPC title

  • Wafer tapes, e.g. grinding or dicing support tapes · CPC title

  • using temporarily an auxiliary support · CPC title

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What does patent US9040389B2 cover?
In one embodiment, a method of forming a semiconductor device comprises forming a groove on and/or over a first side of a substrate. A dicing layer is formed from a second side of the substrate using a laser process. The second side is opposite the first side. The dicing layer is disposed under the groove within the substrate. The substrate is singulated through the dicing layer.
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 26 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).