DC-DC converter and manufacturing method thereof
US-9224757-B2 · Dec 29, 2015 · US
US9040367B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9040367-B2 |
| Application number | US-201213590561-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 21, 2012 |
| Priority date | Aug 21, 2012 |
| Publication date | May 26, 2015 |
| Grant date | May 26, 2015 |
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An improved nLDMOS ESD protection device having an increased holding voltage is disclosed. Embodiments include: providing in a substrate a DVNW region; providing a HVPW region in the DVNW region; providing bulk and source regions in the HVPW region; providing a drain region in the DVNW region, separate from the HVPW region; and providing a polysilicon gate over a portion of the HVPW region and the DVNW region.
Opening claim text (preview).
What is claimed is: 1. A method comprising: providing in a substrate a dual voltage n-well (DVNW) region; providing a high voltage p-well (HVPW) region in the DVNW region; providing bulk and source regions in the HVPW region; providing a drain region in the DVNW region, separate from the HVPW region; providing a polysilicon gate over a portion of the HVPW region and the DVNW region; and providing in the source region in the HVPW region, second and third N+ regions and a…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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