N/p boundary effect reduction for metal gate transistors
US-2015364459-A1 · Dec 17, 2015 · US
US9040317B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9040317-B2 |
| Application number | US-201213428925-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 23, 2012 |
| Priority date | Mar 23, 2012 |
| Publication date | May 26, 2015 |
| Grant date | May 26, 2015 |
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A method includes performing a patterning step on a layer using a process gas. When the patterning step is performed, a signal strength is monitored, wherein the signal strength is from an emission spectrum of a compound generated from the patterning step. The compound includes an element in the patterned layer. At a time the signal strength is reduced to a pre-determined threshold value, the patterning step is stopped.
Opening claim text (preview).
What is claimed is: 1. A method comprising: performing a patterning step on a first layer using a process gas, wherein the patterning step comprises: an etching step for etching down the first layer; and after the first layer is etched through, performing a trimming step on the first layer to remove parts of the first layer; when the patterning step is performed, monitoring a signal strength from an emission spectrum of a compound generated from the patterning step, wherein…
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