Methods of forming epitaxial structures

US9029246B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9029246-B2
Application numberUS-201313954659-A
CountryUS
Kind codeB2
Filing dateJul 30, 2013
Priority dateJul 30, 2013
Publication dateMay 12, 2015
Grant dateMay 12, 2015

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Abstract

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An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound semiconductor. Etching the first surface is performed in the chamber in situ. A second III-V compound semiconductor is epitaxially grown on the altered surface of the first III-V compound semiconductor. The epitaxial growth of the first III-V compound semiconductor may be performed in a MOCVD chamber, and the etch may use an HCl gas. Structures resulting from methods are also disclosed.

First claim

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What is claimed is: 1. A method comprising: forming substrate with a trench, the trench being defined by an isolation region; epitaxially growing a first III-V compound semiconductor in the trench, the first III-V compound semiconductor having a first surface; etching the first surface of the first III-V compound semiconductor to form a modified surface of the first III-V compound semiconductor, the modified surface being below an upper portion of the isolation region; and e…

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What does patent US9029246B2 cover?
An embodiment is a method. A first III-V compound semiconductor is epitaxially grown in a trench on a substrate, and the epitaxial growth is performed in a chamber. The first III-V compound semiconductor has a first surface comprising a facet. After the epitaxial growth, the first surface of the first III-V compound semiconductor is etched to form an altered surface of the first III-V compound …
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H10W10/014. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 12 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).