Transistor, semiconductor device, and semiconductor structure
US-2024379874-A1 · Nov 14, 2024 · US
US9012995B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012995-B2 |
| Application number | US-201314047044-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 7, 2013 |
| Priority date | Apr 11, 2007 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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A memory element includes a FinFET select device and a memory element. In some embodiments a memory cell has a contact element coupled between a surface of the fin and the memory element.
Opening claim text (preview).
What is claimed is: 1. An apparatus, comprising, comprising: a memory element having two terminals; a source line, extending in a first direction above the surface of a substrate; a pair of fins, extending in parallel in a second direction above the surface of the substrate, each of the fins being partially wrapped around by the source line; a local interconnect extending in the first direction above the surface of the substrate, contacting one terminal of the memory element…
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