Three-terminal synapse device and method of operating the same
US-9224946-B2 · Dec 29, 2015 · US
US9012964B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9012964-B2 |
| Application number | US-201313963855-A |
| Country | US |
| Kind code | B2 |
| Filing date | Aug 9, 2013 |
| Priority date | Aug 9, 2013 |
| Publication date | Apr 21, 2015 |
| Grant date | Apr 21, 2015 |
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An integrated circuit structure includes a gate stack over a semiconductor substrate, and an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack. A first silicon germanium region is disposed in the opening, wherein the first silicon germanium region has a first germanium percentage. A second silicon germanium region is overlying the first silicon germanium region, wherein the second silicon germanium region has a second germanium percentage higher than the first germanium percentage. A metal silicide region is over and in contact with the second silicon germanium region.
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What is claimed is: 1. An integrated circuit structure comprising: a semiconductor substrate; a gate stack over the semiconductor substrate; an opening extending into the semiconductor substrate, wherein the opening is adjacent to the gate stack; a first silicon germanium region in the opening, wherein the first silicon germanium region has a first germanium percentage; a second silicon germanium region over the first silicon germanium region, wherein the second silicon ge…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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