Method of manufacturing a flat panel display device

US9012273B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9012273-B2
Application numberUS-201414163873-A
CountryUS
Kind codeB2
Filing dateJan 24, 2014
Priority dateJun 7, 2010
Publication dateApr 21, 2015
Grant dateApr 21, 2015

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the TFT including a gate electrode, a source electrode, and a drain electrode; and a storage capacitor located at a region where the common voltage line and the drain electrode cross each other, the storage capacitor including first, second, and a third storage electrodes.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a flat panel display device, the method comprising: preparing a substrate on which pixel areas are defined, the pixel areas comprising a thin film transistor (TFT) area and a storage capacitor area; forming an active layer on the TFT area of the substrate; forming a gate line extending in a first direction on the substrate, a gate electrode located in the TFT area, and a first storage electrode in the storage capacitor area; f…

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What does patent US9012273B2 cover?
A flat panel display device having increased capacitance and a method of manufacturing the flat panel display device are provided. A flat panel display device includes: a plurality of pixel areas, each located at a crossing region of a gate line, a data line, and a common voltage line; a thin film transistor (TFT) located at a region where the gate line and the data line cross each other, the T…
Who is the assignee on this patent?
Samsung Display Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10D1/042. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 21 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).