Method of manufacturing semiconductor structure having air gap
US-12132087-B2 · Oct 29, 2024 · US
Semiconductor structure having an air-gap region and a method of manufacturing the same
US8999839B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8999839-B2 |
| Application number | US-201313895005-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 15, 2013 |
| Priority date | Feb 18, 2010 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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Abstract
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A method of manufacturing a semiconductor structure, the method includes removing a portion of a dielectric filler from a first metal-containing layer formed over a semiconductor substrate to define an air-gap region according to a predetermined air-gap pattern. The method further includes filling the air-gap region with a decomposable filler and forming a dielectric capping layer over the first metal-containing layer. The method further includes decomposing the decomposable filler.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of manufacturing a semiconductor structure comprising: removing a portion of a dielectric filler from a first metal-containing layer formed over a semiconductor substrate to define an air-gap region according to a predetermined air-gap pattern, the first metal-containing layer comprising a metal structure and the dielectric filler; filling the air-gap region with a decomposable filler; forming a dielectric capping layer over the first metal-cont…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8999839B2 cover?
- A method of manufacturing a semiconductor structure, the method includes removing a portion of a dielectric filler from a first metal-containing layer formed over a semiconductor substrate to define an air-gap region according to a predetermined air-gap pattern. The method further includes filling the air-gap region with a decomposable filler and forming a dielectric capping layer over the firs…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10W20/072. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Apr 07 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).