Systems and methods of testing memory devices
US-2024387303-A1 · Nov 21, 2024 · US
US8999814B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8999814-B2 |
| Application number | US-201414251086-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 11, 2014 |
| Priority date | Apr 17, 2013 |
| Publication date | Apr 7, 2015 |
| Grant date | Apr 7, 2015 |
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A semiconductor device fabricating method includes forming device chip regions and a monitor chip region for processing management, on a substrate surface layer on one main surface side of a semiconductor substrate wafer, each device chip region having an active region and an edge region; after forming metal films on front surface of the device chip regions and the monitor chip region by vapor deposition and photolithography, forming protective films on the front surfaces of the device chip regions and monitor chip region; and grinding and polishing another main surface side of the semiconductor substrate wafer to thin the semiconductor substrate wafer. A difference between an area of one chip occupied by the protective film of the monitor chip region and an area of one chip occupied by the protective film of the device chip region is 20% or less.
Opening claim text (preview).
What is claimed is: 1. A semiconductor device fabricating method, comprising: a first step of forming device chip regions, and a monitor chip region for processing management including in a center thereof a sensing region, on a substrate surface layer in a region compartmentalized in lattice form on one main surface side of a semiconductor substrate wafer, each device chip region having a required active region and an edge region surrounding the active region; a second step of,…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Electricity · mapped topic
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