Data Encoding in Solid-State Storage Devices
US-2015380087-A1 · Dec 31, 2015 · US
Method, device and computer program product for decoding a codeword
US8996958B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996958-B2 |
| Application number | US-201113574368-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 27, 2011 |
| Priority date | Jan 28, 2010 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Abstract
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A method and apparatus for decoding a codeword received from a flash memory. The flash memory comprises multi-level flash memory cells, wherein each multi-level flash memory cell stores one symbol of the codeword. An ECC decoder is arranged for decoding the codeword into a decoded codeword and correcting a maximum number of errors. The method determines the number of errors in the codeword. If the number of errors is more than the maximum number of errors that the ECC decoder can correct, the method generates modified codewords, calculates a corrective effect of a modified codeword, and determines a decoded codeword based on the corrective effect.
First claim
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The invention claimed is: 1. A method for decoding a codeword (W) received from a flash memory comprising multi-level flash memory cells, wherein each multi-level flash memory cell stores one symbol (Si) of said codeword (W), and wherein an ECC decoder is arranged for decoding said codeword (W) into a decoded codeword (D) and correcting a maximum number (t) of errors, the method comprising: determining the number (e) of errors in said codeword W; if said number (e) of errors is…
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- G06F11/1072Primary
Physics · mapped topic
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- What does patent US8996958B2 cover?
- A method and apparatus for decoding a codeword received from a flash memory. The flash memory comprises multi-level flash memory cells, wherein each multi-level flash memory cell stores one symbol of the codeword. An ECC decoder is arranged for decoding the codeword into a decoded codeword and correcting a maximum number of errors. The method determines the number of errors in the codeword. If …
- Who is the assignee on this patent?
- Cideciyan Roy D, Iliadis Ilias, Pletka Roman, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification G06F11/1072. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Mar 31 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).