Semiconductor test system and method
US-9222977-B2 · Dec 29, 2015 · US
US8996941B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8996941-B2 |
| Application number | US-201313914529-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 10, 2013 |
| Priority date | Jun 8, 2012 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Background scan cells are selected from scan cells in a circuit based on specified bit distribution information for a plurality of test cubes generated for testing the circuit. A main portion and a background portion are then determined for each test cube in the plurality of test cubes. The background portion corresponds to the background scan cells. Test cubes in the plurality of test cubes that have compatible main portions are merged into test cube groups. Each test cube group in the test cube groups comprises a main test cube and background test cubes. A main test cube, supplied by a tester or a decompressor, may be shifted into the scan chains. A background test cube may be shifted into background chains and be inserted into the main test cube in the scan chains based on control signals.
Opening claim text (preview).
What is claimed is: 1. A method, executed by at least one processor of a computer, comprising: selecting background scan cells from scan cells in a circuit based on specified bit distribution information for a plurality of test cubes generated for testing the circuit; determining a main portion and a background portion for each test cube in the plurality of test cubes, the background portion corresponding to the background scan cells; merging test cubes in the plurality of tes…
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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