Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
US8994082B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994082-B2 |
| Application number | US-201113250856-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 30, 2011 |
| Priority date | Sep 30, 2011 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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Transistors, methods of manufacturing thereof, and image sensor circuits with reduced random telegraph signal (RTS) noise are disclosed. In one embodiment, a transistor includes a channel disposed between two isolation regions in a workpiece. The channel has edge regions proximate the isolation regions and a central region between the edge regions. The transistor includes a gate dielectric disposed over the channel, and a gate disposed over the gate dielectric. The transistor includes a voltage threshold modification feature proximate the edge regions configured to increase a voltage threshold of the transistor proximate edge regions relative to the central region of the channel.
Opening claim text (preview).
What is claimed is: 1. A transistor, comprising: a channel disposed between two isolation regions laterally spaced apart by an uninterrupted portion of a semiconductor material in a workpiece, the channel comprising edge regions proximate the isolation regions and a central region between the edge regions; a gate dielectric disposed over the channel and extending over a portion of the two isolation regions; and a voltage threshold modification feature configured to increase a…
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