Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US8994048B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8994048-B2 |
| Application number | US-96411710-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 9, 2010 |
| Priority date | Dec 9, 2010 |
| Publication date | Mar 31, 2015 |
| Grant date | Mar 31, 2015 |
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A semiconductor device has a substrate with a first and second recess formed in a surface of the substrate using a wet etch process. The second recess can have a size different from a size of the first recess. A plurality of conductive vias are formed in a surface of the first and second recesses using a dry etch process. A first conductive layer is formed over the surface of the substrate, over curved side walls of the first and second recesses, and electrically connected to the plurality of conductive vias. A first and second semiconductor die are mounted into the first and second recesses respectively. The second semiconductor die can have a size different from a size of the first semiconductor die. The first and second semiconductor die are electrically connected to the first conductive layer. An interconnect structure is electrically connected to the plurality of conductive vias.
Opening claim text (preview).
What is claimed: 1. A method of making a semiconductor device, comprising: providing a substrate; forming a first recess in a surface of the substrate; forming a plurality of conductive vias in a surface of the first recess; forming a first conductive layer over the surface of the substrate over a curved side wall of the first recess and electrically connected to the plurality of conductive vias; disposing a first semiconductor die within the first recess electrically conn…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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