Method for creating ultra-high-density holes and metallization

Patent metadata

Field	Value
Publication number	US-8993398-B1
Application number	US-201113246998-A
Country	US
Kind code	B1
Filing date	Sep 28, 2011
Priority date	Feb 19, 2008
Publication date	Mar 31, 2015
Grant date	Mar 31, 2015

Abstract

Methods and apparatuses directed to high density holes and metallization are described herein. A method may include providing a dielectric layer including a plurality of holes, forming a fill material over a top surface of the dielectric layer and in the plurality of holes, and reflowing the fill material to substantially remove any voids in the plurality of holes. Other embodiments are also described.

First claim

What is claimed is:

1. A method comprising:
forming a substrate such that a plurality of access devices are embedded within the substrate;
forming a sacrificial layer on the substrate;
forming a mask layer on the sacrificial layer;
patterning the mask layer to (i) form a plurality of mask islands by removing portions of the mask layer and (ii) reveal portions of the sacrificial layer, wherein the plurality of mask islands are formed on a corresponding plurality of sections of the sacrificial layer, and wherein the plurality of sections of the sacrificial layer are formed on a corresponding access device of the plurality of access devices that are embedded within the substrate;
removing the revealed portions of the sacrificial layer to form a plurality of pillars of the sacrificial layer, wherein ones of the plurality of pillars are disposed between corresponding ones of the plurality of mask islands and the substrate, wherein each pillar of the plurality of pillars is formed over the corresponding access device of the plurality of access devices that are embedded within the substrate;
forming a dielectric layer around the plurality of pillars; and
removing the plurality of mask islands and the plurality of pillars to form a corresponding plurality of holes in the dielectric layer, thereby providing (i) the dielectric layer and (ii) the plurality of holes in the dielectric layer, wherein the plurality of holes in the dielectric layer are formed on the corresponding access device of the plurality of access devices that are embedded within the substrate.

2. The method of claim 1 , further comprising:
forming a respective bottom electrode contact at a bottom surface of each hole of the plurality of holes.

3. The method of claim 2 , further comprising:
subsequent to forming the respective bottom electrode contact at the bottom surface of each hole of the plurality of holes, depositing a first layer of a fill material (i) in the plurality of holes and (ii) over a top surface of the dielectric layer,
wherein the first layer of the fill material is deposited over the respective bottom electrode contact at the bottom surface of each hole of the plurality of holes,
wherein while depositing the first layer of the fill material, a first void is formed in a top surface of the first layer of the fill material, and
wherein the first void in the top surface of the first layer of the fill material is formed in a position that is over a first hole of the plurality of holes;

removing at least a portion of the first layer of the fill material over the top surface of the dielectric layer; and
depositing a second layer of the fill material (i) in the plurality of holes and (ii) over the top surface of the dielectric layer having the at least the portion of the first layer of the fill material removed to fill the plurality of holes with the fill material such that the plurality of holes are substantially free of any voids, including the first void.

4. The method of claim 3 , wherein the first layer of the fill material is formed by sputtering.

5. The method of claim 4 , wherein the at least a portion of the first layer of the fill material is removed by sputter etching.

6. The method of claim 3 , wherein the removing of the at least a portion of the first layer of the fill material comprises removing a portion of the first layer from the plurality of holes.

7. The method of claim 3 , wherein removing at least a portion of the first layer comprises a chemical-mechanical-planarization operation.

8. The method of claim 3 , wherein the fill material is an oxide or a phase change material.

9. The method of claim 2 , further comprising:
coupling each access device of the plurality of access devices to a corresponding bottom electrode contact at the bottom surface of a corresponding hole of the plurality of holes.

10. The method of claim 1 , wherein each of the plurality of access devices comprises an access diode or an access transistor.

Assignees

• Sutardja Pantas
• Chang Runzi
• Marvell Int Ltd

Inventors

• Sutardja Pantas
• Chang Runzi

Classifications

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/081 Primary

  by forming openings in the dielectric parts · CPC title

• H10N70/066

  by filling of openings, e.g. damascene method · CPC title

• H10N70/026

  by physical vapor deposition, e.g. sputtering · CPC title

• H10N70/8828

  Tellurides, e.g. GeSbTe · CPC title