Post-silicon validation using a partial reference model

Patent metadata

Field	Value
Publication number	US-8990622-B2
Application number	US-201213561036-A
Country	US
Kind code	B2
Filing date	Jul 29, 2012
Priority date	Jul 29, 2012
Publication date	Mar 24, 2015
Grant date	Mar 24, 2015

Abstract

Method, system and product for post silicon validation using a partial reference model. The method performed by a device having registers, the method comprising: first executing, by the device when operating in trace mode, a test-case, wherein during the execution utilizing a partial reference model to determine an expected value of at least one register; second executing, by the device when operating in non-trace mode, the test-case; and in response to said second executing, checking values of registers based on, at least in part, values determined during said first execution.

First claim

What is claimed is:

1. A computer-implemented method, the method performed by a device, wherein the device having registers, the method comprising:
determining an instruction to be generated having a set of input registers and a target register;
determining a combination of values to the input registers for which a partial reference model provides an expected result;
generating a test-case including the instruction, wherein the test-case is configured to initialize the input r…

Assignees

• Landa Shimon
• Nahir Amir
• IBM

Inventors

• Landa Shimon
• Nahir Amir

Classifications

• G06F11/263 Primary

  Physics · mapped topic