Solid-state image sensor

US8988571B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8988571-B2
Application numberUS-67656208-A
CountryUS
Kind codeB2
Filing dateSep 4, 2008
Priority dateSep 5, 2007
Publication dateMar 24, 2015
Grant dateMar 24, 2015

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A pixel area with a two-dimensional array of pixels ( 10 ) each including a photodiode and a memory area ( 3 a ) on which memory sections for holding signals produced by the pixels for continuously recordable frames are separately provided on a semiconductor substrate. All the pixels simultaneously perform a photocharge storage operation, and the signals produced by the photocharge storage are extracted in parallel through mutually independent pixel output lines ( 14 ). In a plurality of memory sections connected to one pixel output line, a sample-and-hold transistor of a different memory section is turned on for each exposure cycle so as to sequentially hold signals in a capacitor of each memory section. After the continuous imaging is completed, all the pixel are sequentially read. Unlike CCD cameras, the present sensor does not simultaneously drive all the gate loads. Therefore, the sensor consumes less power yet can be driven at high speeds. The separation between the memory area and pixel area prevents signals from deterioration due to an intrusion of excessive photocharges. As a result, the sensor can perform imaging operations at higher speeds than ever before and yet capture images with higher qualities.

First claim

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The invention claimed is: 1. A solid-state image sensor comprising: a) a pixel area in which a plurality of pixels are arranged in a two-dimensional array, each pixel including a photoelectric conversion element for receiving light and producing photocharges; and b) a memory area provided separately from the pixel area and having a plurality of memory sections for holding output signals corresponding to each of the plurality of pixels within the pixel area; wherein one respective pixel output line independently extends from each pixel within the pixel area, each of the plurality of pixels is connected to multiple memory sections of the plurality of memory sections in parallel through the pixel output line. 2. The solid-state image sensor according to claim 1 , which is characterized in that the plurality of memory sections each include at least one memory element and has a gate unit provided between each memory element and the pixel output line. 3. The solid-state image sensor according to claim 1 , which is characterized in that each pixel within the pixel area includes: a transfer element for transferring the photocharges produced by the photoelectric conversion element to a detection node for converting electric charge signals to voltage signals; a buffer element, provided between the detection node and the pixel output line of each pixel, for sending signals from the detection node to the pixel output line; and a reset element for resetting at least the photoelectric conversion element and the detection node. 4. The solid-state image sensor according to claim 3 , which is characterized in that each pixel within the pixel area includes at least one charge storage element for storing photocharges overflowing from the photoelectric conversion element via the transfer element or from the detection node during an operation of storing photocharges. 5. The solid-state image sensor according to claim 3 , which is characterized in that each of the plurality of memory sections corresponding to one pixel has a plurality of memory elements capable of independently holding an output signal from the pixel, and a control signal is supplied to each pixel and each memory section so that a noise component remaining when the photoelectric conversion element and the detection node are reset in each pixel, and a signal corresponding to the charge resulting from the storage of the photocharges, are held by different memory elements in the same memory section within one cycle of the photocharge storage operation. 6. The solid-state image sensor according to claim 3 , which is characterized in that the pixel area has a rectangular planar shape, and the memory area is arranged on an outside of one or more of four sides of the pixel area. 7. The solid-state image sensor according to claim 6 , which is characterized in that the memory area is divided into sections corresponding to the pixel-area sections and each of the memory-area sections is arranged on an outside of a different side of four sides of the pixel area. 8. The solid-state image sensor according to claim 3 , which is characterized in that the plurality of pixel output lines are arranged on the photoelectric conversion element, and a plurality of on-chip micro-lenses approximately shaped like a partial sphere or partial cylinder are arranged over the plurality of pixel output lines so that these lenses form images between the plurality of pixel output lines. 9. The solid-state image sensor according to claim 3 , which is characterized in that the memory section includes a capacitor and a switch element for receiving an output signal received from each pixel through the pixel output line and sending the output signal into the capacitor. 10. The solid-state image sensor according to claim 3 , which is characterized in that at least the photoelectric conversion elements of the pixels are provided on a back side of a semiconductor substrate opposite from an element formation surface on which the memory area is formed, and the back side is used as a light-incidence surface. 11. The solid-state image sensor according to claim 3 , which is characterized in that the solid-state image sensor is constructed as a three-dimensional integrated circuit with a plurality of semiconductor layers separated by an insulating layer, and the pixel area and the memory area are formed on different semiconductor layers. 12. The solid-state image sensor according to claim 3 , which is characterized in that the solid-state image sensor is composed of a plurality of semiconductor integrated circuit elements, and the pixel area and the memory area are formed on different semiconductor integrated circuit elements. 13. A solid-state image sensor, comprising: a) a photoelectric conversion element for receiving light and producing photocharges; b) a transfer element for transferring the photocharges produced by the photoelectric conversion element to a detection node for converting electric charge signals to voltage signals; c) a buffer element for sending an output signal from the detection node to a pixel output line; d) a reset element for resetting at least the photoelectric conversion element and the detection node; and e) a plurality of memory sections for holding the output signals sent from the same buffer element through the pixel output line, wherein the photoelectric conversion element, the transfer element, the buffer element and the reset element form one pixel, a plurality of the pixels are arranged in a two-dimensional array within a pixel area, the plurality of memory sections are integrated for each pixel and placed within a memory area provided separately from the pixel area, and each of a plurality of output lines independently extends from each pixel, each of the plurality of pixels is connected to multiple memory sections of the plurality of memory sections in parallel through the pixel output line. 14. The solid-state image sensor according to claim 13 , which is characterized in that each pixel within the pixel area includes at least one charge storage element for storing photocharges overflowing from the photoelectric conversion element via the transfer element or from the detection node during an operation of storing photocharges. 15. The solid-state image sensor according to claim 13 , which is characterized in that a common control signal is supplied to all the pixels so that an operation of storing photocharges in each pixel and an operation of reading signals from each pixel through the pixel output line are simultaneously performed at all the pixels. 16. The solid-state image sensor according to claim 13 , which is characterized in that a control signal is supplied to each pixel and each memory section so that an operation of storing photocharges in each pixel and an operation of reading signals from each pixel through the pixel output line are simultaneously repeated at all the pixels, and the signal transferred through each pixel output signal for every signal-reading operation is sequentially held by the plurality of memory sections. 17. The solid-state image sensor according to claim 13 , which is characterized in that each of the plurality of memory sections corresponding to one pixel has a plurality of memory elements capable of independently holding an output signal from the pixel, and a control signal is supplied to each pixel and each memory section so that a noise component remaining when the photoelectric conversion element and the detection node are reset in each pixel, and a signal corresponding to the charge resulting from the storag

Assignees

Inventors

Classifications

  • comprising storage means other than floating diffusion · CPC title

  • H04N25/575Primary

    with a response composed of multiple slopes · CPC title

  • Readout circuits for addressed sensors, e.g. output amplifiers or A/D converters · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US8988571B2 cover?
A pixel area with a two-dimensional array of pixels ( 10 ) each including a photodiode and a memory area ( 3 a ) on which memory sections for holding signals produced by the pixels for continuously recordable frames are separately provided on a semiconductor substrate. All the pixels simultaneously perform a photocharge storage operation, and the signals produced by the photocharge storage ar…
Who is the assignee on this patent?
Sugawa Shigetoshi, Kondo Yasushi, Tominaga Hideki, and 2 more
What technology area does this patent fall under?
Primary CPC classification H04N25/575. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).